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Semiconductor structure manufacturing method and semiconductor structure

A semiconductor and isolation structure technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve the problems of reduced active area area of ​​device unit area, reduced device performance, and increased process difficulty, so as to improve device performance , Reduce device disconnection and improve production yield

Active Publication Date: 2018-05-22
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for preparing a semiconductor structure and a semiconductor structure, which are used to solve the problem of the active area of ​​the device unit region in the prior art when performing a gate thermal oxidation process. Oxidation reduces the actual active area of ​​the device unit area, leading to problems such as device performance degradation, production yield decline, and subsequent process difficulty.

Method used

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  • Semiconductor structure manufacturing method and semiconductor structure
  • Semiconductor structure manufacturing method and semiconductor structure
  • Semiconductor structure manufacturing method and semiconductor structure

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Embodiment 1

[0051] see figure 2 , the invention provides a kind of preparation method of semiconductor structure, the preparation method of described semiconductor structure comprises the following steps at least:

[0052] 1) A semiconductor substrate is provided, the semiconductor substrate includes a device unit area and a peripheral unit area located on the periphery of the device unit area;

[0053] 2) forming a barrier layer on the upper surface of the device unit region;

[0054] 3) Under the protection of the barrier layer, the structure obtained in step 2) is subjected to semiconductor oxidation treatment, so as to form a gate oxide layer on the upper surface of the peripheral cell region.

[0055] Please refer to figure 2 Step S1 in and image 3 , first perform step 1), providing a semiconductor substrate 1 , the semiconductor substrate 1 includes a device unit area 11 and a peripheral unit area 12 located on the periphery of the device unit area 11 .

[0056] As an example...

Embodiment 2

[0075] Such as Figure 8 As shown, the present invention also provides a semiconductor structure, and the semiconductor structure of this embodiment is prepared according to the preparation method of the semiconductor structure of the first embodiment. Specifically, the semiconductor structure includes: a semiconductor substrate 1, a first shallow trench isolation structure 13a, a second shallow trench isolation structure 13b, and a gate oxide layer 22; the semiconductor substrate 1 includes a device cell region 11 and a The peripheral cell region 12 on the periphery of the device cell region 11; the first shallow trench isolation structure 13a is located in the device cell region 11, and several first active regions are isolated in the device cell region 11 10a; wherein, the first active region 10a is completely adjacent to the first shallow trench isolation structure 13a; the second shallow trench isolation structure 13b is located in the peripheral cell region 12, and in th...

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Abstract

The invention provides a semiconductor structure manufacturing method and a semiconductor structure. The semiconductor structure manufacturing method comprises steps: 1) a conductor substrate is provided, wherein the conductor substrate comprises a device unit area and a peripheral unit area located on the periphery of the device unit area; 2) a blocking layer is formed on the upper surface of thedevice unit area; and 3) under the protection effects of the blocking layer, the structure obtained in the step 2) is subjected to semiconductor oxidation treatment, and thus, a gate oxide layer is formed on the upper surface of the peripheral unit area. Before gate oxidation is carried out on the upper surface of the peripheral unit area, the blocking layer is firstly formed on the upper surfaceof the device unit area, an active region of the device unit area can be prevented from being oxidized during the gate oxidation process, the area of the active region of the device unit area can beensured not to be reduced, larger process tolerance space can thus be provided for subsequent process production, bad phenomena such as a broken circuit of the device can be greatly reduced, the performance of the device is thus enhanced, the production yield is finally helped to be improved, and the production cost is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for preparing a semiconductor structure and the semiconductor structure. Background technique [0002] With the rapid development of electronic technology, semiconductor integration is getting higher and higher, more and more functional modules are integrated in the unit area of ​​semiconductor devices, and some auxiliary functional modules are set in the peripheral unit area. For example, in a DRAM memory device, the device cell area usually includes multiple memory cells in a matrix, while the peripheral cell area includes circuits for operating memory cells; in other device structures, in order to ensure that the device cell area can achieve high shock To ensure the breakdown voltage and stability, the transition and protection of the device unit area are realized through the circuit in the peripheral area. Of course, the peripheral unit area may also conta...

Claims

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Application Information

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IPC IPC(8): H01L27/108H01L21/8242
CPCH10B12/20H10B12/01
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC