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Method for preparing semiconductor structure and semiconductor structure

A semiconductor and isolation structure technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve the problems of device unit area active area reduction, device performance degradation, production yield decline, etc., to improve the device performance, reduce device open circuit, and avoid the effect of open circuit

Active Publication Date: 2019-05-28
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for preparing a semiconductor structure and a semiconductor structure, which are used to solve the problem of the active area of ​​the device unit region in the prior art when performing a gate thermal oxidation process. Oxidation reduces the actual active area of ​​the device unit area, leading to problems such as device performance degradation, production yield decline, and subsequent process difficulty.

Method used

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  • Method for preparing semiconductor structure and semiconductor structure
  • Method for preparing semiconductor structure and semiconductor structure
  • Method for preparing semiconductor structure and semiconductor structure

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Embodiment 1

[0051] see figure 2 , the present invention provides a method for preparing a semiconductor structure, the method for preparing a semiconductor structure at least includes the following steps:

[0052] 1) A semiconductor substrate is provided, the semiconductor substrate includes a device unit area and a peripheral unit area located on the periphery of the device unit area;

[0053] 2) forming a barrier layer on the upper surface of the device unit region;

[0054] 3) Under the protection of the barrier layer, the structure obtained in step 2) is subjected to semiconductor oxidation treatment, so as to form a gate oxide layer on the upper surface of the peripheral cell region.

[0055] Please refer to figure 2 Step S1 in and image 3 , first perform step 1), providing a semiconductor substrate 1 , the semiconductor substrate 1 includes a device unit area 11 and a peripheral unit area 12 located on the periphery of the device unit area 11 .

[0056] As an example, a first s...

Embodiment 2

[0075] Such as Figure 8 As shown, the present invention also provides a semiconductor structure, and the semiconductor structure in this embodiment is prepared according to the method for preparing the semiconductor structure in the first embodiment. Specifically, the semiconductor structure includes: a semiconductor substrate 1, a first shallow trench isolation structure 13a, a second shallow trench isolation structure 13b, and a gate oxide layer 22; the semiconductor substrate 1 includes a device cell region 11 and a The peripheral cell area 12 on the periphery of the device cell area 11; the first shallow trench isolation structure 13a is located in the device cell area 11, and several first active regions are isolated in the device cell area 11 10a; wherein, the first active region 10a is completely adjacent to the first shallow trench isolation structure 13a; the second shallow trench isolation structure 13b is located in the peripheral cell region 12, and in the Severa...

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Abstract

The invention provides a method for preparing a semiconductor structure and the semiconductor structure. The method for preparing a semiconductor structure includes the steps of: 1) providing a semiconductor substrate, the semiconductor substrate includes a device unit area and a peripheral unit area located on the periphery of the device unit area; 2) forming a barrier layer on the upper surface of the device unit area; 3) Under the protection of the barrier layer, the structure obtained in step 2) is subjected to semiconductor oxidation treatment, so as to form a gate oxide layer on the upper surface of the peripheral cell region. In the present invention, before the gate oxidation is performed on the upper surface of the peripheral unit area, a barrier layer is formed on the upper surface of the device unit area to prevent the active area of ​​the device unit area from being oxidized during the gate oxidation process to ensure the device unit area. The area of ​​the active area will not be reduced, so as to provide a larger process tolerance space for subsequent process production, and can greatly reduce defects such as device disconnection, thereby improving device performance, and ultimately helping to improve production yield and reduce production costs.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for preparing a semiconductor structure and the semiconductor structure. Background technique [0002] With the rapid development of electronic technology, semiconductor integration is getting higher and higher, more and more functional modules are integrated in the unit area of ​​semiconductor devices, and some auxiliary functional modules are set in the peripheral unit area. For example, in a DRAM memory device, the device cell area usually includes multiple memory cells in a matrix, while the peripheral cell area includes circuits for operating memory cells; in other device structures, in order to ensure that the device cell area can achieve high shock To ensure the breakdown voltage and stability, the transition and protection of the device unit area are realized through the circuit in the peripheral area. Of course, the peripheral unit area may also conta...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/108H01L21/8242H10B12/00
CPCH10B12/20H10B12/01
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC