SSD hard disk under multiple CPUs

A technology of CPU resources and hard disks, applied in the computer field, can solve the problems of random read and write patterns, waste of resources, and inability to obtain, and achieve the effect of speeding up task processing

Inactive Publication Date: 2018-07-31
SHENZHEN YILIAN INFORMATION SYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present invention provides an SSD hard disk with multiple CPUs, which solves the problem that in the prior art, the read-write mode of the host is very random. When only one CPU load is particularly heavy in a certain read-write mode of the host, the host cannot obtain The resources such as SRAM occupied by the other CPU lead to the technical problem of wasting resources, and realize the optimization of resource allocation for multiple CPU layers. At the same time, it is very suitable for some tasks with low loading. Only one CPU resource is needed, but a lot of SRAM and other resources are needed. When resources are available, enough non-CPU resources can be obtained to speed up task processing. Multiple CPU layers will have one CPU responsible for resource scheduling, and the technical effect of logical concentration

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  • SSD hard disk under multiple CPUs

Examples

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Embodiment 1

[0027] Figure 1 to Figure 3 It is a schematic diagram of an SSD hard disk under multiple CPUs in an embodiment of the present invention. Such as Figure 1 to Figure 3 As shown, the SSD hard disk includes:

[0028] The first processor is responsible for data processing of the Host (host) front-end NVMe. Wherein, the SSD hard disk further includes: a fourth processor, wherein the fourth processor is responsible for data processing of non-CPU resources.

[0029] Further, the fourth processor is located at the layer where the first processor is located, and the fourth processor is arranged asymmetrically with the first processor.

[0030] Specifically, the SSD hard disk includes: a first processor, a second processor, a third processor and a fourth processor. The first processor is responsible for the data processing of the Host front-end NVMe, which can be called Host CPU (host server); the fourth processor is responsible for the data processing of non-CPU resources; the fou...

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Abstract

The invention provides an SSD hard disk under multiple CPUs. The SSD hard disk comprises a first processor, a second processor, a third processor and a fourth processor, wherein the first processor isresponsible for data processing of an NVMe at the front end of a Host, the second processor is responsible for data processing of a flash conversion layer, the third processor is responsible for managing the data processing of the back end of an NAND, and the fourth processor is responsible for data processing of non-CPU resources. The problem in the prior art is solved that when the load of onlyone CPU is extra heavy under a certain read-write mode, the host cannot obtain SRAM resources and the like occupied by another CPU, causing the waste of resources, the technical effects are achievedthat resource allocation for multiple CPU layers is optimized, the SSD hard disk is suitable for some tasks without heavy load, only one CPU resource is needed, but when multiple resources such as SRAM resource and the like are needed, enough non-CPU resource can be obtained to speed up task processing, and the multiple CPU layers can have one CPU responsible for resource scheduling, and the logicis centralized.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to an SSD hard disk under multiple CPUs. Background technique [0002] The mainstream SSD controller SOC (Solid State Disk Controller System Chip) generally includes three processors, one is responsible for Host front-end NVMe-related business, which can be called Host CPU (host server); one is responsible for processing FTL (Flash transform layer) The flash conversion layer converts the access in the form of the host LBA sector into the access in the form of NAND Flash (flash memory) blocks and pages, which can be called Core CPU (core processor); the last one is the CPU responsible for managing the NAND backend, It may be called Media CPU (Media Processor). As hosts continue to improve SSD performance requirements, the processing capabilities of 3 CPUs can no longer meet the requirements, so there is a 4-CPU SSD controller (solid-state drive controller) architecture. The mainst...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50
CPCG06F9/505
Inventor 杨禹
Owner SHENZHEN YILIAN INFORMATION SYST CO LTD
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