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Apparatus and method for estimating shift amount when performing floating-point subtraction

A technology of shift amount and floating-point operation, which is applied in calculation, instrumentation, data transformation, etc., and can solve the problem that FP numbers cannot have true exponents, etc.

Pending Publication Date: 2018-10-23
ARM LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Exponential decrement becomes a problem when the exponent is already small, since FP numbers cannot have a true exponent lower than a predetermined minimum
Therefore, any proposed left shift produced by LZA needs to be qualified so that no left shift that causes the exponent to decrement below the minimum value is applied

Method used

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  • Apparatus and method for estimating shift amount when performing floating-point subtraction
  • Apparatus and method for estimating shift amount when performing floating-point subtraction
  • Apparatus and method for estimating shift amount when performing floating-point subtraction

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Embodiment Construction

[0014] Before discussing the embodiments with reference to the figures, the following descriptions of the embodiments are provided.

[0015] In one embodiment, an apparatus is provided having processing circuitry for performing a subtraction operation on first and second floating point operands. In one embodiment, prior to performing the subtraction operation, the first and second floating point operands are arranged to have the same exponent value and have associated first and second significand values, respectively. During performing the subtraction operation, the processing circuit is then arranged to subtract the second significant value from the first significant value to generate a difference value.

[0016] Additionally, a shift estimation circuit is used to determine an estimated amount of shift to be applied to the difference. The shift estimation circuit includes a significand analysis circuit for generating a first bit string based on the analysis of the first and ...

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PUM

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Abstract

The disclosure relates to an apparatus and method for estimating a shift amount when performing floating-point subtraction. An apparatus and a method are provided for estimating a shift amount to perform a subtraction operation and generate a difference value. Shift estimation circuitry then determines an estimated shift amount to be applied to the difference value. The shift estimation circuitrycomprises significand analysis circuitry to generate a first bit string identifying a most significant bit position within the difference value that is predicted to have a bit set to a determined value according to analysis of the significand values of the two floating-point operands. Shift limiting circuitry generates a second bit string identifying a shift limit bit position from an exponent value. The shift limiting circuitry has computation circuitry to perform an associated computation using bits of the exponent value to determine a value for that bit position within the second bit stringfor each bit position in at least a subset of bit positions of the second bit string. Combining circuitry then generates a combined bit string from the first and second bit strings, and shift determination circuitry determines the estimated shift amount from the combined bit string.

Description

technical field [0001] The present disclosure relates to apparatus and methods for estimating shift amounts when performing floating point subtraction. Background technique [0002] It is common to use floating point (FP) representations in data processing systems. Floating-point numbers include a significand and an exponent indicating the significance of the bits of the significand. A normalized floating-point number has a significand of at least 1 and less than 2, so the format is 1.xxxxx. When subtracting one floating point number from another, the result can be very small numbers, i.e. there can be a large number of leading zeros. In seeking to renormalize the significand of the result, a left shift operation can be performed on the difference obtained by subtracting one significand from another. [0003] It is known to use a leading zero predictor circuit (LZA circuit) to predict how many leading zeros will be present in the difference based on an analysis of the sig...

Claims

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Application Information

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IPC IPC(8): G06F7/504G06F7/57
CPCG06F7/504G06F7/57G06F7/485G06F5/012G06F7/49921
Inventor 大卫·雷蒙德·鲁茨伊恩·迈克尔·考尔菲尔德
Owner ARM LTD