Method and device for parallel polar code encoding/decoding
A technology of polar coding and polar code, applied in the field of parallel polar code coding/decoding, which can solve the problems of low reliability and low possibility of being correctly decoded
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[0042] The making and using of the embodiments are discussed in detail below. It should be appreciated, however, that the present disclosure provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific examples described are merely illustrative of specific ways to make and use embodiments of the disclosure, and do not limit the scope of the claims. The term "parity bits" is used loosely to denote any auxiliary bits used for error detection when decoding information bits, including (but not limited to) cyclic redundancy check (CRC) bits, checksum bits, hash function bits , encryption code, repetition code or error detection bit or code. The terms "parity bits", "parity check (PC) bits", "dynamically frozen bits" and "parity check (PC) frozen bits" (paritycheck (PC) frozen bits) or simply "PF bits" are used in are used interchangeably in this disclosure.
[0043] Since code length is directly related to subchannel relia...
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