Thread importance based processor core partitioning

A processor core, an important technology, applied in the direction of electrical digital data processing, digital data processing components, instruments, etc., can solve problems such as consuming a lot of power, battery exhaustion, frustration, etc.

Pending Publication Date: 2019-06-18
MICROSOFT TECH LICENSING LLC
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  • Claims
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Problems solved by technology

One such problem is that the various functions provided by these computing devices consume large amounts of power
This causes the battery to drain, making the user unable to use the

Method used

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  • Thread importance based processor core partitioning
  • Thread importance based processor core partitioning
  • Thread importance based processor core partitioning

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Embodiment Construction

[0012] This article discusses processor core partitioning based on thread importance. A computing device includes one or more processors, and each processor includes one or more processor cores (also referred to herein simply as cores). Various programs run on a computing device as one or more processes, each process including one or more threads. Each processor core supports a variety of different frequency ranges, also known as p-states, and can operate to run threads in any of these different frequency ranges. The efficiency of a processor core varies across frequency ranges and is usually not linear. For example, the amount of work done by a processor increases approximately linearly with the frequency of the processor core, but the amount of power consumed to perform the workload may increase at a faster rate (eg, exponentially).

[0013] Threads in a computing device are assigned one of several importance levels. There may be two levels of importance (eg, important an...

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Abstract

Each processor core in a device supports various different frequency ranges and/or energy performance preferences, and can operate to run threads at any one of those different frequency ranges and/orenergy performance preferences. Processor cores are partitioned into different groups, each group running at different frequency ranges and/or energy performance preferences. Threads in the device areassigned one of multiple importance levels and scheduled to run on a processor core in a particular group based on the importance level of the thread. Lower importance level threads are scheduled torun in a group that is more power efficient, and higher importance level threads are scheduled to run in a group that is higher performance. The group that a processor core is part of can change during operation of the device based on the needs of the device and/or applications running on the device.

Description

Background technique [0001] With the advancement of computing technology, computers are becoming more and more common in our lives. Many computing devices are designed to run on battery power, such as mobile phones, tablet computers, and the like. Such mobility with computing devices increases their usability, but is not without problems. One such problem is that the various functions provided by these computing devices consume large amounts of power. This causes the battery to drain, preventing the user from using the computing device until the computing device is recharged. This can lead to users not being able to use their devices the way they want, and users getting frustrated with their devices. Contents of the invention [0002] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subj...

Claims

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Application Information

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IPC IPC(8): G06F1/324G06F1/3234G06F1/329G06F9/50
CPCG06F1/324G06F1/3243G06F1/329G06F9/5094Y02D10/00G06F9/4893G06F1/08G06F9/4881G06F9/5038G06F9/5077
Inventor M·埃伊根徐凯伦T·A·布朗
Owner MICROSOFT TECH LICENSING LLC
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