A circuit for chip pins
A chip tube and circuit technology, applied in emergency protection circuit devices, circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, etc., can solve problems such as failure to achieve pin damage
Active Publication Date: 2021-08-27
HUAWEI TECH CO LTD
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- Application Information
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Problems solved by technology
However, while the anti-backflow processing circuit avoids the impact of the positive voltage discharge channel on the IO power supply, it cannot realize the function of preventing pin damage
Method used
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[0023] The application provides a circuit for chip pins, which is used to release the voltage on the chip pins, protect the electronic devices in the chip from being damaged, and reduce the failure rate of the chip during production, testing or use.
[0024] The technical solutions in this application will be clearly and completely described below in conjunction with the drawings in this application. Apparently, the described embodiments are only some of the embodiments of this application, not all of them. The terms "first", "second", "third", "fourth" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, but not necessarily to describe specific sequence or sequence. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps, functions or...
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The application discloses a circuit for chip pins, which releases the voltage on the chip pins and protects electronic devices in the chip from being damaged. The method of the present application includes: a first transistor, a second transistor, a first sub-circuit, a second sub-circuit and a third sub-circuit; the first pole of the first transistor is connected and connected to the first pole of the second transistor To the chip pin, the second pole of the first transistor is connected to the positive pole of the power supply, and the second pole of the second transistor is connected to the negative pole of the power supply; the first sub-circuit is connected to the positive pole of the power supply and the negative pole of the power supply Between, the first sub-circuit is connected to the third pole of the first transistor and the third pole of the second transistor; the second sub-circuit is connected between the positive pole of the power supply and the pin of the chip Between; the third sub-circuit is connected between the chip pin and the negative pole of the power supply, and is used to release the positive voltage on the chip pin to the negative pole of the power supply.
Description
technical field [0001] The present application relates to the field of chip technology, in particular to a circuit for chip pins. Background technique [0002] Chip pins (Pins), also known as chip pins, are the interfaces between the internal circuits of the chip and the external circuits of the chip. The pins of the chip are divided into input or output pins, the input pins are used to input the signal of the external circuit to the internal circuit of the chip, and the output pins are used to output the signal of the internal circuit of the chip to the external circuit of the chip. [0003] At present, the internal output circuit structure of the input and output (input output, IO) pins of the chip is mainly composed of two metal oxide semiconductor (MOS) transistors, and the drains of the two MOS transistors are connected and further connected to the chip transistor. foot. The first MOS transistor is connected to the IO power supply, and the second MOS transistor is con...
Claims
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IPC IPC(8): H03K19/003
CPCH03K19/00315H02H9/00H03K19/003
Inventor 王珏黄伦学
Owner HUAWEI TECH CO LTD