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Flash interface design method based on UPM mode

A technology of interface design and mode, applied in the field of software and hardware, can solve problems such as lack of support for large-capacity storage software and hardware

Inactive Publication Date: 2019-11-12
TIANJIN NAVIGATION INSTR RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, under the VxWorks system based on the PowerPC architecture, there is a lack of support for large-capacity storage software and hardware

Method used

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  • Flash interface design method based on UPM mode
  • Flash interface design method based on UPM mode

Examples

Experimental program
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Embodiment Construction

[0016] Embodiments of the present invention are described in further detail below in conjunction with the accompanying drawings:

[0017] The UPM (User Programmable Controller) of the PowerPC local bus controller can run single-bit or burst access, refresh and other special commands according to user-defined timing, and supports 64K to 256M bytes of DRAM and other 8-bit and 16-bit or 32-bit peripherals. UPM has three modes: UPMA, UPMB, and UPMC. The main control signals include chip selection signals. Byte Strobe General control signal LGPL[0:5]. By configuring the 64 32-bit configuration words of the RAM array, the control signals of various storage devices and peripheral devices can be flexibly generated. The functional block diagram is shown in figure 1 .

[0018] A kind of Flash interface design method based on UPM mode, such as figure 1 shown, including the following steps:

[0019] Step 1, configuration of UPM working mode;

[0020] The configuration method of t...

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PUM

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Abstract

The invention relates to a Flash interface design method based on a UPM mode. The Flash interface design method is technically characterized by comprising the following steps: step 1, configuring a UPM working mode; and step 2, setting time sequence parameters through configuration of the UPM working mode in the step 1, and converting an internal storage access request, a timing refresh request, aspecial operation command, an abnormal request and an internal bus read-write request into external signals LGPLn, LBsn and LCSn, so that corresponding pins output correct time sequence waveforms. According to the method, the technical blank of large-capacity storage under the VxWorks system is filled up.

Description

technical field [0001] The invention belongs to the technical field of software and hardware of a PowerPC local bus interface, and relates to a method for designing a NAND Flash interface, in particular to a method for designing a Flash interface based on a UPM mode. Background technique [0002] At present, the local bus controllers of PowerPC include general-purpose chip select controller GPCM, synchronous SDRAM controller and user programmable controller UPM. Compared with GPCM and SDRAM, UPM has a more flexible control interface, which can flexibly generate control signals for various storage devices and peripheral devices according to user-defined timing. At present, under the VxWorks system based on the PowerPC architecture, there is a lack of support for large-capacity storage software and hardware. Contents of the invention [0003] The purpose of the present invention is to overcome the deficiencies in the prior art, propose a kind of Flash interface design metho...

Claims

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Application Information

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IPC IPC(8): G06F13/16
CPCG06F13/1668
Inventor 赵连云于立北刘新元盛郁魏红珍厉振波
Owner TIANJIN NAVIGATION INSTR RES INST