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A method compatible with aging testing and its chip

A kind of aging test and chip technology, applied in electronic circuit test, environment/reliability test, components of electrical measuring instruments, etc., to achieve the effect of low cost

Active Publication Date: 2022-08-05
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this special mode cannot be entered due to the above-mentioned reasons of the aging test machine, so it is impossible to enter the special mode for switching

Method used

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  • A method compatible with aging testing and its chip
  • A method compatible with aging testing and its chip
  • A method compatible with aging testing and its chip

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Embodiment Construction

[0046] In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Thus, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the...

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Abstract

The invention provides a method and chip compatible with aging test. Before the low-speed test is completed, the chip uses the state of the low-speed receiving module; after the low-speed test is completed, the chip is set to the state of the high-speed receiving module. The chip includes an adjustable receiving unit and an internal unit of the chip; the adjustable receiving unit includes: an adjusting module and a receiving module; the adjusting module is used to control the state of the receiving module to be a low-speed state or a high-speed state; the receiving module includes a transmission interface, which is used for It is used to receive signals; it receives the signal of the aging test machine during the burn-in test; it receives the signal of the external circuit during normal operation. For high-speed chips, it can not only meet the requirements of low-speed working signals for burn-in testing, but also meet the requirements of high-speed signals during normal operation.

Description

technical field [0001] The invention relates to the field of semiconductor chip testing. In particular, it relates to a method compatible with burn-in test and a chip thereof. Background technique [0002] The durability burn-in test (BI Burn In) such as the reliability test of the semiconductor chip in the prior art adopts the basic function test, that is, the operating frequency of the chip will be reduced to below a lower frequency. This is due to cost control, weak output driving capability and low speed of the burn-in test machine, resulting in slow rise and fall of the signal input from the burn-in test machine to the product under test, and great signal noise. [0003] When the burn-in test machine (equipment) performs the burn-in test (BI) of some products, especially for the test of high-speed chips, the receiver module (receiver) of these high-speed chips has high sensitivity, because the burn-in test machine input The signal to the receiving module rises and fal...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28G01R1/04
CPCG01R31/28G01R31/003G01R1/0416
Inventor 俞冰谈杰王嵩
Owner XI AN UNIIC SEMICON CO LTD