Embedded multi-CPU interconnection circuit based on SDIO interface, interconnection method and driving method

An embedded, interface technology, applied in the field of network isolation, which can solve problems such as reducing data transmission performance

Active Publication Date: 2020-04-07
成都三零嘉微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the standard SDIO protocol uses the multiplexing of the transceiver interface, which reduces the data transmission performance to a certain extent.

Method used

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  • Embedded multi-CPU interconnection circuit based on SDIO interface, interconnection method and driving method
  • Embedded multi-CPU interconnection circuit based on SDIO interface, interconnection method and driving method
  • Embedded multi-CPU interconnection circuit based on SDIO interface, interconnection method and driving method

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Embodiment Construction

[0088] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, the specific implementation manners of the present invention will now be described with reference to the accompanying drawings.

[0089] Such as figure 1 The embedded multi-CPU interconnection circuit based on the SDIO interface shown includes a CPU group composed of multiple CPUs and an isolation acceleration unit. Each CPU and the isolation acceleration unit are connected by two sets of independent SDIO channels for receiving and sending and dedicated The connection of receiving and sending is interrupted, and the CPU group is connected with the host machine, the internal network and the external network.

[0090] The isolation acceleration unit is an isolation acceleration CPU or FPGA; the CPU is an embedded CPU, and the CPU group includes CPU-0, CPU-1 and CPU-2, and the CPU-0 communicates with the host computer through a USB interface, Complete the pol...

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Abstract

The invention provides an embedded multi-CPU interconnection circuit based on an SDIO interface, an interconnection method and a driving method. The interconnection circuit comprises a CPU set composed of a plurality of CPUs and an isolation acceleration unit, each CPU and the isolation acceleration unit are connected through two sets of receiving and sending independent SDIO channels and specialreceiving and sending interruptions, and the CPU set is connected with a host machine, an intranet and an extranet. The interconnection method comprises an initialization step, a register configuration step, a data transmission step and an interrupt implementation step. The driving method comprises the following steps: S1, registering a network card device; S2, initializing an SDIO device; S3, requesting necessary system resources, and informing the network card device of starting to work; S4, when the input device prepares the data or the output device can receive the data, sending an interrupt request to the CPUs to perform data transmission. The problem of high CPU occupancy rate caused by multiplexing of receiving and sending bus and query processing adopted by the embedded CPU end isavoided, and the defects of low bus utilization rate and channel congestion are overcome.

Description

technical field [0001] The invention relates to the field of network isolation, in particular to an embedded multi-CPU interconnection circuit based on an SDIO interface, an interconnection method and a driving method. Background technique [0002] With the in-depth application of network technology, in order to cope with the special needs of new network attack methods and high-security networks, the application of "network isolation technology" was born. By isolating harmful network security threats, data information can be guaranteed Interaction is completed within the communication network; at present, the general network isolation technology is based on the idea of ​​access control and physical isolation; the dedicated embedded hardware isolation technology is the core of the network isolation technology, mainly including the internal network processing unit, external network processing unit There are three parts: a dedicated isolation switching unit and a dedicated isol...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L29/06G06F15/17
CPCH04L63/02G06F15/17Y02D10/00
Inventor 索艳滨邹式论卿辉刘鸿宇
Owner 成都三零嘉微电子有限公司
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