Clock circuit management method and device and computer readable medium

Abstract

According to an embodiment of the invention, a data buffering method, electronic equipment and a computer readable medium are provided. The method comprises the following steps: receiving, at a firstnode of the network, time window information from a second node of the network, wherein the time window information defines a time window in which data is transmitted from the first node to the secondnode; enabling a first clock circuit of the first node to provide a first clock signal for data transmission from the first node to the second node based at least in part on the time window information. In this way, power consumption at the first node can be effectively reduced.

Description

technical field [0001] Embodiments of the present disclosure relate generally to the field of communications, and more particularly, to methods, apparatus, and computer-readable media for clock circuit management. Background technique [0002] In existing network communication, a point-to-multipoint topology is a common network topology, for example, a passive optical network (PON). In order to realize synchronous communication of uplink and downlink data, both the sender and the receiver need to maintain corresponding clock circuits. [0003] In recent years, with the rapid increase of data communication rate, the performance requirements of the clock management circuit in the device are also getting higher and higher. Higher frequency clock circuits are widely used in equipment management and uplink and downlink data transmission control, which significantly increases the power consumption of network nodes. So far, there is no effective clock circuit management mechanism...

AI Technical Summary

Problems solved by technology

So far, there is no effective clock circuit management mechanism that can reduce the power consumption of network nodes while maintaining normal communication of network nodes.

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