Manufacturing method of 3D NAND memory device and 3D NAND memory device

A 3DNAND, storage device technology, applied in electric solid state devices, semiconductor devices, electrical components, etc., can solve the problems of complex step structure, cumbersome process of trimming and etching, etc., to reduce the driving time delay and reduce the number of masks. Effect

Pending Publication Date: 2021-01-05
YANGTZE MEMORY TECH CO LTD
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  • Application Information

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Problems solved by technology

[0003] However, in the current 3D NAND memory device, as the number of stacked layers increases, the corresponding step structure is more complicated, and the process of trimming and etching is more cumbersome.

Method used

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  • Manufacturing method of 3D NAND memory device and 3D NAND memory device
  • Manufacturing method of 3D NAND memory device and 3D NAND memory device
  • Manufacturing method of 3D NAND memory device and 3D NAND memory device

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Embodiment Construction

[0067] The inventors have found that when using dual stack technology (dual stack) for stacking design of 3D NAND memory devices, as the number of stacking layers increases, the design of the step structure for driving connections becomes more and more complicated. As the number increases, the process of trimming and etching becomes more complicated; at the same time, if figure 1 As shown, a single storage array in a 3D NAND storage device adopts a single-side drive structure design, that is, it is driven from a stepped structure on one side of the storage array, figure 1 The stepped structures 201 and 202 in the storage array structure 101 are unilaterally driven, figure 1 The step structures 203 and 204 in the storage array structure 102 are unilaterally driven. As the number of stacked layers increases, each layer of the stacked composite layer is designed to be thinner and thinner, corresponding to the drive resistance of the storage block in the storage array structure. ...

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Abstract

The invention provides a manufacturing method of a 3D NAND memory device and the 3D NAND memory device. A step structure is arranged in the middle of a stacking structure and comprises a plurality ofmutually independent step substructures and a combination bridge structure, so that bilateral driving of the step structure is realized, the resistance during driving control is effectively reduced, and the problem of driving time delay is obviously improved; when the step subarea is formed by etching, the step structure of the top selection gate is formed at the same time, so that the etching process steps are reduced; when the step substructure is formed, the step M * N subarea is formed through etching firstly, then the step M * N subarea is etched, M * N steps can be formed at the same time through one-time etching, and the etching process steps are reduced; when the step substructure is formed, the step unit located in the upper half area of the step subarea is formed through trimmingand etching firstly, then etching is reduced, the step unit is etched and copied to the lower half area of the step subarea, the process steps of trimming and etching are further reduced, and the production efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a 3D NAND storage device and the 3D NAND storage device. Background technique [0002] 3D NAND storage device is a technology for stacking data units. At present, more than 32 or even 72 layers of data units can be stacked. It overcomes the limitation of the actual expansion limit of planar memory, further increases the storage capacity, and reduces The storage cost of data bits reduces energy consumption. [0003] However, in the current 3D NAND storage device, as the number of stacked layers increases, the corresponding step structure is more complicated, and the process of trimming and etching is more cumbersome. Contents of the invention [0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for manufacturing a stepped structure in a 3D NAND memory devi...

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): H01L27/11524H01L27/11551H01L27/1157H01L27/11578H10B41/35H10B41/20H10B43/20H10B43/35
CPCH10B41/20H10B41/35H10B43/20H10B43/35
Inventor张中韩玉辉
OwnerYANGTZE MEMORY TECH CO LTD