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Asynchronous RAM read-write method and device, terminal equipment and readable storage medium

A read-write method and asynchronous technology, applied in the field of memory, can solve the problems of RAM data read-write conflict, affecting the effective writing and reading of RAM data, etc.

Pending Publication Date: 2021-06-18
SHENZHEN YSPRING TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] According to different sampling clocks, random access memory (Random Access Memory, RAM) can be divided into synchronous RAM and asynchronous RAM. Synchronous RAM means that the same clock is used for reading and writing. RAM, because the write clock and the read clock have different frequencies, it may cause conflicts between reading and writing of RAM data, which in turn affects the effective writing and reading of RAM data

Method used

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  • Asynchronous RAM read-write method and device, terminal equipment and readable storage medium
  • Asynchronous RAM read-write method and device, terminal equipment and readable storage medium
  • Asynchronous RAM read-write method and device, terminal equipment and readable storage medium

Examples

Experimental program
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Effect test

Embodiment 1

[0058] An example of this application, such as figure 1 As shown, the first asynchronous RAM read and write method proposed includes the following steps:

[0059] S100: Obtain the read address at the current time in the read time domain and the write address at the current time in the write time domain.

[0060] The read and write address of RAM can be based on figure 2 The shown asynchronous RAM storage matrix shows that X0~Xn can be used to represent row selection lines, Y0~Yn can be used to represent column selection lines, and X0~Xn and Y0~Yn can be used to represent read addresses and write addresses.

[0061] Exemplarily, if the address is 00010001, it means address "1" corresponding to the intersection of row X0 and row Y0, and if the address is 00010011, it means address "3" corresponding to the intersection of row X0 and row Y2.

[0062] S200: Synchronize the read address at the current moment and the write address at the current moment on the same time domain.

...

Embodiment 2

[0076] An example of this application, such as Figure 5 As shown, a second asynchronous RAM reading and writing method is proposed, which also includes the following steps after step S200:

[0077] S320: In the same time domain, if 0 ≤ the write address at the current moment - the read address at the current moment, and the write full mark of the asynchronous RAM indicates that it is full, then suspend the write operation of the asynchronous RAM and keep the asynchronous RAM The read operation is normal.

[0078] If 0≤the write address at the current moment-the read address at the current moment, and the full mark of the asynchronous RAM indicates that it is full, such as Figure 6 As shown, the write pointer Wdr is written to the maximum address N of the asynchronous RAM, and after writing the write pointer Wdr one round, write from the minimum address "1" again, and exceed the read pointer Rdr, resulting in the unread data data4 and data5 being Data dataN+4 and dataN+5 co...

Embodiment 3

[0080] An example of this application, such as Figure 7 As shown, a third asynchronous RAM reading and writing method is proposed, which also includes the following steps after step S200:

[0081] S330: In the same time domain, if the second threshold

[0082] If the second threshold Figure 8 As shown, the write pointer Wdr is written to the maximum address N of the asynchronous RAM, that is, the write pointer Wdr completes one round of writing, and writes again from the minimum address "1". And, the write address of the current moment corresponding to the write pointer Wdr minus the read address of the current moment corresponding to the read pointer Rdr is less than or equal to 0, and greater than the second...

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Abstract

The embodiment of the invention discloses an asynchronous RAM (Random Access Memory) read-write method and device, terminal equipment and a readable storage medium. Therefore, the asynchronous RAM can ensure that the read operation of the asynchronous RAM is paused (namely, the position of a read pointer Rdr is kept unchanged) under different read-write frequencies under the conditions that the write address at the current moment minus the read address at the current moment is less than a first threshold value and equal to or greater than 0, and the full-write mark of the asynchronous RAM indicates that the asynchronous RAM is not full, the write operation of the asynchronous RAM is kept normal (namely, the write pointer Wdr moves normally). According to the method and the device, the data is ensured to be normally written into the address with empty data, and the distance between the write pointer Wdr and the read pointer Rdr is increased to avoid read-write conflicts, so that the asynchronous RAM can stably read and write the data, and the stability of the storage process is ensured.

Description

technical field [0001] The invention relates to the field of memory, in particular to an asynchronous RAM reading and writing method, device, terminal equipment and readable storage medium. Background technique [0002] According to different sampling clocks, random access memory (Random Access Memory, RAM) can be divided into synchronous RAM and asynchronous RAM. Synchronous RAM means that the same clock is used for reading and writing. For RAM, since the frequency of the write clock is different from that of the read clock, it may cause conflicts between reading and writing of RAM data, thereby affecting effective writing and reading of RAM data. Contents of the invention [0003] In view of the above problems, the present application proposes an asynchronous RAM reading and writing method, device, terminal equipment and readable storage medium. [0004] The present application proposes an asynchronous RAM reading and writing method, the method comprising: [0005] Obt...

Claims

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Application Information

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IPC IPC(8): G11C11/409G11C11/408G11C7/22G06F5/06
CPCG06F5/065G11C7/222G11C11/408G11C11/409
Inventor 尚军辉李卓文庄腾飞
Owner SHENZHEN YSPRING TECH
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