A packaging structure and packaging method of a multi-chip parallel-connected power module

Abstract

The invention discloses a package structure and a package method of a multi-chip parallel power module, which can be applied to silicon power modules and wide bandgap semiconductor power modules such as silicon carbide and gallium nitride; the package structure includes: a heat dissipation substrate, an insulating substrate , power chips, drive resistors, thermistors, laminated insulating blocks and decoupling capacitors, bonding wires, potting glue, shells and terminals attached to the insulating substrate; The chip provides a dynamic commutation circuit of the same length, and dynamically decouples the terminal inductance, thereby reducing the dynamic current difference during the switching process and the voltage spike during the turn-off process of the parallel-connected power chips; the drive signal of the power switch tube chip The cable is connected by Kelvin, which enhances the stability of the drive. The encapsulation method provided by the present invention can provide a reliable processing method for the above encapsulation structure, so that the encapsulation structure can be realized with low cost and good processing quality.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices. More specifically, it relates to a packaging structure and packaging method of a multi-chip parallel power module. Background technique [0002] With the rapid development of transportation, aerospace and other fields, new requirements are put forward for the existing power modules and power systems. In the power supply system, the switching speed of the switching tube of the power module continues to increase, and the switching loss continues to decrease, which can make the operating frequency of the converter continue to increase and the volume to decrease. [0003] However, most of the existing commercial power modules have large parasitic inductance parameters (the parasitic inductance of the commutation loop can reach more than 15nH), which makes the switching tube chip withstand a large peak voltage when it is turned off at high speed. In addition, in a multi-chip para...

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