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Verification method and device based on DUT substitution model, equipment and medium

A technology that replaces models and verification methods, applied in the field of verification, can solve problems that affect the overall progress of chip development and take a long time, and achieve the effect of shortening the overall time and improving efficiency

Pending Publication Date: 2021-11-19
杭州云合智网技术有限公司
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0002] The traditional chip verification work is generally started after the designer provides the mature, stable and self-tested register transfer level circuit RTL (Register Transfer Level) design code. However, this two tasks are performed in a sequential manner, which costs A long time will eventually affect the overall progress of the entire chip development work

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  • Verification method and device based on DUT substitution model, equipment and medium
  • Verification method and device based on DUT substitution model, equipment and medium
  • Verification method and device based on DUT substitution model, equipment and medium

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Embodiment Construction

[0039] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0040] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure shall have ordinary meanings understood by those skilled in the art to which the present disclosure belongs. "First", "second" and similar words used in the embodiments of the present disclosure do not indicate any sequence, quantity or importance, but are only used to distinguish different components. "Comprising" or "comprising" and similar words mean that the elements or items appearing before the word include the elements or items listed after the word and their equivalents, without excluding other elements or items. Words such as "connected" or "connected" are not lim...

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Abstract

The invention provides a verification method and device based on a DUT substitution model, equipment and a medium. The method comprises the following steps: judging whether a first DUT is an unfinished design or not; in response to the fact that the first DUT is in the unfinished design, carrying out verification based on the DUT substitution model, and obtaining a first output signal; and validating a second DUT based on the first output signal, wherein the second DUT is functionally associated with the first DUT. According to the invention, a parallel working mode of design work and verification work is realized, the verification work can be carried out without waiting for RTL design completion, the overall time of the verification work and the design work is greatly shortened, and the chip development efficiency is effectively improved.

Description

technical field [0001] The present disclosure relates to the field of verification, and in particular to a verification method, device and equipment based on a DUT substitution model. Background technique [0002] The traditional chip verification work is generally started after the designer provides the mature, stable and self-tested register transfer level circuit RTL (Register Transfer Level) design code. However, this two tasks are performed in a sequential manner, which costs A long time will eventually affect the overall progress of the entire chip development work. Contents of the invention [0003] In view of this, the purpose of the present disclosure is to propose a verification method, device, equipment and medium based on a DUT substitution model. [0004] According to a first aspect of the present disclosure, a verification method based on a DUT substitution model is provided, including: [0005] judging whether the first DUT is an unfinished design; [000...

Claims

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Application Information

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IPC IPC(8): G06F30/33G06F115/02
CPCG06F30/33G06F2115/02
Inventor 马骁
Owner 杭州云合智网技术有限公司