Chip aging test monitoring method, electronic equipment and storage medium
A technology for chip aging testing and testing equipment, which is applied in the direction of measuring electricity, measuring electrical variables, and electronic circuit testing, etc. It can solve the problems of large deviation of test results and untimely monitoring of temperature change process, so as to solve the problem of large deviation of test results and improve Effect of Aging Test Accuracy
Active Publication Date: 2022-02-18
江山季丰电子科技有限公司 +2
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[0004] The purpose of the present invention is to provide a chip packaging test board and a monitoring method for high and low temperature aging tests of chips, so as to alleviate the technical problems of large deviations of test results among multiple samples and untimely monitoring of temperature changes in the prior art
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[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations.
[0027] Accordingly, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art wi...
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The invention provides a monitoring method for a chip aging test, electronic equipment and a storage medium, and relates to the technical field of chip tests. The method is applied to a tester connected with chip packaging test equipment, and the method comprises the steps: determining the temperature of a chip to be tested based on the resistance value of a resistance test layer; and based on the deformation position and the deformation quantity of the resistance test layer, determining the deformation position and the deformation quantity of the chip to be tested, wherein a resistor on the resistor test layer is of a snakelike wiring structure, and the snakelike wiring structure is connected with the testing machine and used for monitoring the temperature and deformation of chip packaging in the aging testing process. According to the method, the temperature and deformation of the chip to be tested in the aging test process are monitored, the technical problems that in the prior art, the test result deviation of multiple samples is large, and the temperature change process is not monitored in time are solved, and the effect of improving the high and low temperature aging test precision of the chip is achieved.
Description
technical field [0001] The invention relates to the technical field of chip testing, in particular to a monitoring method for chip aging testing, electronic equipment and a storage medium. Background technique [0002] In order to evaluate the performance of chip products and ensure that the use of chips meets the needs of design and actual use, high and low temperature aging tests are usually performed on chips. Currently, multiple batches of packaged chip samples are generally placed in a high and low temperature test box at the same time for testing (the test temperature range is usually -40°C to 125°C), the number of samples is often more than 80, and sometimes it can be Reach 400 or more. [0003] Due to the air duct design of the high and low temperature test box, the external chip test board has a certain airflow obstruction, which often leads to large deviations in the test results of multiple samples. Since the entire box body needs to be sealed during the test, o...
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Login to View More IPC IPC(8): G01R31/28
CPCG01R31/2874G01R31/2896
Inventor 陈吉锋谈昳晔倪卫华郑朝晖
Owner 江山季丰电子科技有限公司