Unlock instant, AI-driven research and patent intelligence for your innovation.

System and method including distributed instruction buffers holding a second instruction form

A technique of instruction format and second instruction, applied in the direction of concurrent instruction execution, instrument, machine execution device, etc., can solve the problem of no instruction set scheduling system or method

Inactive Publication Date: 2004-06-16
INT BUSINESS MASCH CORP
View PDF0 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is no system or method for scheduling different instruction sets according to performance and usage in the prior art

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System and method including distributed instruction buffers holding a second instruction form
  • System and method including distributed instruction buffers holding a second instruction form
  • System and method including distributed instruction buffers holding a second instruction form

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] In accordance with one embodiment of the present invention, a system and method are provided for a processor capable of performing at least two operations per processor cycle with an execution bandwidth greater than that used in a compiler-specified processing Instruction fetch / decode / issue bandwidth in the program, the compiler analyzes the code running in the processor.

[0022] It can be understood that the present invention can be implemented in various forms of hardware, software, firmware, dedicated processors or combinations thereof. In one embodiment, the invention can be implemented in software, substantially embodied as an application program on a program storage device. The application program can be loaded into and executed by a machine comprising any suitable architecture. Preferably, the machine is implemented in a computer having hardware such as one or more central processing units (CPUs), a random access memory (RAM), and input / output (I / O)(s) on the ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A processor for processing a first instruction form and a second instruction form of an instruction set comprises execution units (301-305) connected to an instruction fetch unit (322) for the first instruction form and a sequencer (325) for the second instruction form. The processor comprises a decode unit (323) for decoding instructions of the first instruction form into control signals for the execution units (301-305), and buffers (306-310), proximate to the execution units (301-305), for storing predecoded instructions of the second instruction form.

Description

technical field [0001] The present invention relates to the design of semiconductor processors, and more particularly, the present invention relates to processors capable of performing two or more operations per processor cycle. Background technique [0002] The processor of a modern computer has several independent execution units that can operate simultaneously. However, the number of execution units that can actually do (deterministic or speculative) efficient work is limited by the logic in the instruction issue unit and the number of instructions issued per cycle. The issue logic determines dependencies before sending instructions to execution units. With an out-of-order processor, the issue logic limits the performance of the processor, while with an in-order processor, its performance is limited by the available instruction fetch bandwidth to the memory subsystem. [0003] The use of Very Long Instruction Word (VLIW) instruction sets for in-order processors is a pro...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3867G06F9/3885G06F9/3802
Inventor E·R·奥尔特曼C·J·格洛斯内尔三世E·赫凯内克D·梅尔策M·穆徳吉尔
Owner INT BUSINESS MASCH CORP