Current balancing method for operation amplifier design

Abstract

The method includes following steps: the control circuit is used to monitor the current inputted into transistor in operational amplifier, and makes the current dynamically and evenly flow across these transistors so that these transistor can work in saturation area; when the input signal is large signal, the input geminate transistors turn off , and the current passing through these transistors changes from I into U2; for making these transistors to safely work in the saturation area, the control circuit checking the working state of inputting geminate transistor controls the current passing through these transistors; when the control circuit detects there are inputting geminate transistors at turning off state, it will turn off two path current source connected with these transistors to balance the current passing through these transistors.

Description

Technical field [0001] The invention relates to a current balance method for the design of an operational amplifier (Operational Amplifier). Background technique [0002] At present, when designing an op amp, the bias current is specified through a current mirror, such as figure 1 shown. This operational amplifier design method can work normally when the input is a small signal. If the input signal is a large signal, for example, the amplitude of the input signal is close to the supply voltage (supply), at this time, the NMOS input pair transistors N1 and N2 are turned on, while the PMOS input pair transistors P1 and P2 are turned off, and N5 and N6 need a current I to maintain It works in the saturation region, while N3 and N4 can only provide current I / 2, which may force N5 and N6 to enter the linear region, and the gain of the op amp drops significantly. The same problem is encountered when the input signal amplitude is close to the power ground. [0003] In particula...

AI Technical Summary

Problems solved by technology

When the input common-mode voltage is biased near the supply voltage (supply) (or power ground (ground)), the PMOS input pair transistors P1, P2 (or NMOS input pair transistors N1, N2) are turned off, in order to maintain a constant transconductance ( constant-gm) characteristics, the tail current (tail) of the NMOS input pair tubes N1 and N2 should be four times the original, correspondingly, the current absorbed by the NMO input pair tube from the sleeve (cascode) level is four times the original, so Large current can easily make the P4 and P5 of the sleeve (cascode) level enter the linear region, making the gain of the op amp drop significantly

Images