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Information processing device and information processing method

一种信息处理设备、管理信息的技术，应用在信息处理设备领域，能够解决时间效率低下等问题，达到减少开销、高成功率的效果

Inactive Publication Date: 2006-10-04
SOCIONEXT INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, when an invalid block is detected, the startup process needs to be stopped, or the initial program retransmitted from other blocks, resulting in time inefficiency
[0008] Check symbols, such as ECC, etc., are invalid for errors with a predetermined number or more bits

Method used

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  • Information processing device and information processing method
  • Information processing device and information processing method
  • Information processing device and information processing method

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0055] FIG. 1 is a block diagram illustrating the structure of an information processing apparatus according to a first embodiment of the present invention. FIG. 2 is a diagram illustrating the relationship between blocks and pages in a NAND type flash memory. attached image 3 It is a block diagram illustrating the structure of the boot program (BSP) of FIG. 1 . attached Figure 4 is a diagram illustrating a typical format of management information in the information processing apparatus of FIG. 1 .

[0056] As shown in FIG. 1 , the information processing device 1 includes a CPU 21 , a first storage device 31 , a second storage device 32 , a third storage device 33 , a transmission device 24 and a CPU control device 17 . These sections are connected to each other by data buses 16a to 16c.

[0057] The CPU 21 is the main CPU of the information processing device 1 , and performs system booting by executing a boot program 26 (hereinafter referred to as “BSP”) transferred from...

no. 2 example

[0098] FIG. 7 is a block diagram illustrating the structure of an information processing apparatus according to a second embodiment of the present invention. The information processing apparatus 2 of the second embodiment has a basic structure similar to that of the first embodiment, and therefore, differences between the two will be mainly described below.

[0099] First, the information processing device 2 of the second embodiment differs from the first embodiment in that management information 41 indicating the positions of invalid blocks existing in the first storage device 37 is stored in a predetermined in the effective block. Another difference from the first embodiment is that a management information acquisition section 39 for acquiring management information 41 from the first storage device 37 is further included in the transmission device 40 .

[0100] attached Figure 8 is a flowchart illustrating a typical control procedure of the transfer determination section ...

no. 3 example

[0111] FIG. 9 is a block diagram illustrating the structure of an information processing apparatus according to a third embodiment of the present invention. The information processing device 3 of the third embodiment has a basic structure similar to that of the second embodiment (FIG. 7), and differs from the second embodiment in that the transmission device 45 further includes a management information pointer storage section 44.

[0112] The management information pointer storage section 44 is constituted by a nonvolatile storage device. The transfer device 45 is configured so that the CPU 21 can write data to the management information pointer storage section 44 via the data bus 16d. The management information pointer storage section 44 stores the address of the management information 41 stored in the first storage device 37 as a management information pointer. The value used as the management information pointer is not particularly limited, and may be, for example, the num...

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Abstract

An information processing device is provided in which a valid initial program is transferred to a RAM while avoiding an invalid block which is present in a low reliable storage device, such as a NAND-type flash memory or the like. A management information storing section 29 stores management information 30 indicating a position of a invalid block in a first storage device 31. When an information processing device 1 is powered on, a transfer determination section 20 is controlled to read a BSP 26 from a valid block of a first storage device 11 based on the management information 30, and transfer the BSP 26 to a second storage device 32. Thereby, it is possible to avoid reading of an invalid block present in the first storage device 31.

Description

technical field [0001] The present invention relates to an information processing device and an information processing method. More particularly, the present invention relates to an information processing device and an information processing method for performing system boot by executing a program stored in a storage device (such as a NAND-type flash memory, etc.) that may originally contain an invalid block There may also be invalid blocks later on. Background technique [0002] The flash memory can be roughly classified into a NOR type and a NAND type. Compared with NAND type flash memory, NOR type flash memory has the advantage that random access can be performed byte by byte, but has the disadvantage of being expensive and having low packing density. [0003] On the other hand, a NAND type flash memory is a memory that can accept invalid blocks if the proportion of invalid blocks is less than or equal to a predetermined value. Therefore, when data is written to or rea...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445
CPCG06F9/4403G06F9/24G06F12/00
Inventor 寺井准一山本泰宜隅田圭三三野吉辉时本芳则
Owner SOCIONEXT INC
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