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Source side injection storage device and method therefor

a storage device and source side technology, applied in the field of nonvolatile memories, can solve the problems of increasing the area of the integrated circuit, increasing the cost, and increasing other difficulties such as read disturb

Active Publication Date: 2007-01-04
NXP USA INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This design reduces chip area and cost while enabling effective SSI programming and reading, minimizing read disturb issues, and allows for efficient use of space in memory arrays.

Problems solved by technology

One of the disadvantages of SSI is that the storage devices require more area on the integrated circuit which increases cost.
VGA has been known to require relatively small area compared to other architectures while increasing other difficulties such as read disturb.

Method used

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  • Source side injection storage device and method therefor
  • Source side injection storage device and method therefor
  • Source side injection storage device and method therefor

Examples

Experimental program
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Embodiment Construction

[0022] In one aspect a storage device has a control gate that is shared by two memory cells and the drain for both memory cells is a first doped region directly under the control gate. The control gate, in the channel direction, completely covers this doped region. The source, in a second doped region, for a given memory cell is disposed away from the shared control gate of the given memory cell. The second doped region is shared by an adjacent memory cell that has a different control gate. This structure provides for reduced area while retaining the ability to perform programming by SSI. This is better understood by reference to the drawings and the following description.

[0023] Shown in FIG. 1 is a storage device structure 10 comprising a semiconductor substrate 12, a silicon oxide layer 14 on substrate 12, and a plurality of patterned silicon nitride layers 16 on silicon oxide layer 14. Silicon oxide layer 14 is preferably 50-100 Angstroms thick. Patterned nitride layers 16 are p...

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PUM

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Abstract

A memory charge storage device has regions of sacrificial material overlying a substrate (12). For each memory cell a first doped region (20) and a second doped region (24) are formed within the substrate and on opposite sides of one (16) of the regions of sacrificial material. A discrete charge storage layer (28) overlies the substrate and is between the regions of sacrificial material. In one form a control electrode (34) is formed per memory cell overlying the substrate with an underlying substrate diffusion and laterally adjacent one of the regions of sacrificial material. A third substrate diffusion (60) is positioned between the two control electrodes. In another form two control electrodes are formed per memory cell with a substrate diffusion underlying each control electrode. In both forms a select electrode (64) overlies and is between both of the two control electrodes.

Description

RELATED APPLICATIONS [0001] This application is related to the following patent applications: [0002] U.S. Patent application titled, “Source Side Injection Storage Device with Control Gates Adjacent to Shared Source / Drain and Method Therefor,” by Hong et al., having docket number SC14220TP, filed concurrently herewith, and assigned to the assignee hereof; and [0003] U.S. patent application titled, “Source Side Injection Storage Device with Spacer Gates and Method Therefor,” by Hong et al., having docket number SC14169TP, filed concurrently herewith, and assigned to the assignee hereof.FIELD OF THE INVENTION [0004] This invention relates to non-volatile memories, and more particularly to storage devices in the non-volatile memories that use source side injection. BACKGROUND OF THE INVENTION [0005] Source side injection (SSI) has been found to have benefits over regular hot carrier injection (HCI) used in the programming of non-volatile memories (NVMs). Programming by SSI is able to b...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/336H01L21/3205
CPCH01L27/112Y10S977/943H01L27/11521H01L27/115H10B20/00H10B69/00H10B41/30
Inventor CHINDALORE, GOWRISHANKAR
Owner NXP USA INC