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VTR signal processing circuit

A signal processing circuit and video recorder technology, applied in recording signal processing, color TV signal processing, magnetic recording, etc., can solve the problems of expensive glass delay lines, reducing the effect of eliminating adjacent tracks, and reducing image quality.

Inactive Publication Date: 2007-10-03
VICTOR CO OF JAPAN LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] When the delay element is one that uses a glass delay line, there is a problem: the glass delay line itself is a rather large device mounted on a circuit board and it is expensive
With this phase change, the elimination effect of the cross-color of adjacent tracks is reduced, causing a reduction in image quality, and when the phase is reversed, the eliminated signal component results in a colorless image

Method used

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  • VTR signal processing circuit
  • VTR signal processing circuit
  • VTR signal processing circuit

Examples

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no. 1 example

[0034] As shown in FIG. 1, a circuit block constituting a VTR signal processing circuit is fabricated together with other circuit blocks on a single semiconductor substrate such as monocrystalline silicon by a known semiconductor integrated circuit (IC) manufacturing technique. Although not specifically limited, the present embodiment is directed to a VTR of a VHS system using a color side wave frequency of 3.58 MHz.

[0035] In FIG. 1, a color video signal converted into a low-band signal of 40fh is separated from the reproduced signal by a low-pass filter not shown in the figure, and input. In the case of the NTSC system, a delay circuit constituted by a CCD (Charge Coupled Device) 3 delays this color video signal by one horizontal period. An input section for performing analog-to-digital conversion is also available. Instead of the CCD3, a shift register for delaying the digital signal and a digital-to-analog (D / A) conversion circuit for restoring the shifted digital signa...

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Abstract

In a VTR signal processing circuit, a first reproduced color under signal and a second reproduced color under signal obtained by delaying by one or two horizontal period in synchronism with a predetermined clock signal are supplied to the first and second frequency converter circuits respectively, a frequency signal having frequency 2n times that of a carrier used in frequency conversion for converting a frequency of the reproduced color under signal into a frequency corresponding to a standard color signal is produced by an oscillator circuit, this oscillation frequency is divided such that it becomes the above mentioned carrier frequency, four carriers having phases degree, degrees, degrees, and degrees respectively are produced, the four carriers are selectively output and supplied to the first and second frequency converter circuits (such that an output signal of the first frequency converter circuit and an output signal of the second frequency converter circuit become in phase or inverted phase, and a color cross-talk between tracks is removed by adding the both output signals or subtracting one of the output signals from the other.

Description

[0001] The present application is a divisional application of the patent application of the same name with an application date of March 10, 1998 and an application number of 98108243.2. technical field [0002] The present invention relates to a VTR (Video Tape Recorder) signal processing circuit, and in particular to a technique effectively used in an apparatus including a frequency converter part of a double main converter system by utilizing two frequency converter circuits And a delay circuit such as a CCD (Charge Coupled Device) eliminates the cross-color contained in the reproduced color under signal. Background technique [0003] Figure 5 is a block diagram of the frequency converter portion of a conventional double converter system of the prior art. [0004] Figure 6(a) is a waveform diagram of a conventional delay operation of a prior art color video signal when operating steadily. [0005] FIG. 6(b) is a waveform diagram of a conventional delay operation of a colo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N9/80G11B20/00G11B5/027G11B20/02H03D7/16H04N9/79H04N9/793H04N9/83H04N9/84
CPCH04N9/7917H04N9/83H04N9/793H04N9/84
Inventor 栗原隆市川嘉久新井泉仓林直树仓本博室谷刚
Owner VICTOR CO OF JAPAN LTD