Channel coding method for communication system
A channel coding and coding technology, applied in the field of channel coding of communication systems, can solve problems such as difficult turbo code tails
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no. 1 example
[0064] The encoder according to the first embodiment of the present invention does not generate tail bits, but inserts known bits at predetermined positions to perform a termination function. In this embodiment, a frame has 16 data bits, and 8 known bit codes each being zero are inserted into the frame at bit positions with a higher probability of error. Here, the bit insertion position is determined by experimentally detecting the position where the most errors occur in the process of decoding encoded data. In addition, the turbo encoder adopts a coding rate of 1 / 3.
[0065] In this embodiment, when 24-bit frame data (16 frame data bits plus 8 known bits) is encoded using a turbo encoder with a 1 / 3 encoding rate, it is experimentally determined to have a higher error rate during decoding probable location. An 8-bit position having a relatively high error probability is determined, and a known bit is inserted into the input frame data bit at the determined position. Here, t...
no. 2 example
[0096] The channel encoder according to the second embodiment of the present invention inserts known bits at bit positions having a higher error occurrence probability, wherein the number of inserted bits is set to exceed the frame size (or length). In this example, it is assumed that each frame includes 16 input data bits and 12 interleaved bits. Since the output data bit I k , parity bit C k and D k Should be 28 bits, the insertion bit will be deleted and the remaining parity bit C k and D k Insert at the position of the deleted bit.
[0097] The number of inserted bits is determined by the number of input data bits, the number of output code symbols and the code rate of the encoder. That is to say, when the number of input data bits of the encoder is N, the number of output code symbols of the encoder is M, and the code rate is 1 / K, the number of inserted bits is (M-KN) / (K-1 ). Thus, when the number of input data bits of the encoder is 16, the number of output code s...
no. 3 example
[0115] The encoder according to the third embodiment of the present invention inserts bits with specific logic at bit positions with a higher probability of error occurrence, wherein the branch encoder encodes the data bits of the known bit insertion, and generates the bits to be added to Encodes the tail bit of the data bits. That is, the encoder according to the third embodiment performs the termination function by bit insertion and tail bit addition.
[0116] Figure 10 is a diagram illustrating an encoder according to a third embodiment of the present invention, see Figure 10 , the bit inserter 1010 receives 16 input bits, and has the same structure as the bit inserter 310 according to the first embodiment. The bit inserter 1010 inserts 8 zero bits at 8 data bit positions in the frame that have a higher error probability under the control of a controller not described. Therefore, in this example, bit interpolator 1010 outputs 24 data bits I k , these data bits are sup...
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