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Memory device detecting method

A detection method and memory technology, applied in static memory, instruments, etc., can solve problems such as virtual welding, adhesion, inaccuracy, etc., and achieve the effect of improving detection efficiency and accurate detection results.

Inactive Publication Date: 2010-02-17
SHENZHEN COSHIP ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Memory has been widely used in various products in the computer, electronics, and communication industries. Moreover, memory has high requirements for production technology (such as mounting technology). In the case of human factors (such as soldering errors, causing problems such as virtual soldering and adhesion), the memory often has short-circuit or open-circuit problems, which has a great impact on the product and often makes the product unable to operate normally
However, such problems are usually difficult to judge by the naked eye of technicians, and software problems caused by such hardware problems are not easy to locate and difficult to reproduce
[0003] The Chinese patent CN200410069098.2 "Detection method of flash memory" published on January 26, 2006 proposes a technical solution for open circuit and short circuit detection of FLASH, which reads and writes each address unit of FLASH operation to determine whether there is a problem with the address unit. Since the FLASH write operation takes a long time, all address units are written, which greatly increases the detection time; The detection process is very cumbersome and the detection results are not accurate, because the read results are inconsistent with the written results, it is not necessarily a problem with the data line, it may also be a problem with the address line or the memory unit
Similarly, the process of detecting the open circuit and short circuit of the address line in this scheme is also very complicated and the detection result is inaccurate

Method used

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Examples

Experimental program
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Effect test

Embodiment 1

[0076] The first stage, reading and writing detection:

[0077] 1. HDDR is 0X0000000, because the odd address of the memory cannot be read and written, so EDDR is 0X1FFFFFE; for the convenience of detection and calculation, set TD1 to "all 0", that is, 0X0000, and TD2 to "all 1", that is, 0XFFFF,

[0078] TD1 and TD2 are interchangeable, which does not affect the implementation of the present invention. The reason why TD1 and TD2 are set to "all 0" and "all 1" is to facilitate the setting of TDG1 and TDG2 in the subsequent second and third stages;

[0079] 2. Write TD1 into HDDR, read back and compare, if the result is correct, it means that each data line is set to a low level '0' and it can be normal, which can eliminate the problem that the data line is always a high level '1', and then , go to the next step; if the result is incorrect, it means that there is a problem with HDDR or address line or data line reading and writing, stop testing and report the problem;

[0080]...

Embodiment 2

[0132] The difference between this embodiment and embodiment 1 is: in the second stage and the third stage of embodiment 1, if a certain data line or address line is found to have a fault, then record the fault, and then continue to detect, and in the In this embodiment, in the second and third stages, as soon as a fault is found in the data line or address line, the detection is stopped and the problem is reported. After the fault is eliminated, the detection of the memory is restarted. The detection process of the second stage and the third stage of the present embodiment are respectively as follows Figure 5 and Figure 6 shown.

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Abstract

The invention discloses a test method for a storage, which mainly includes three test stages which are respectively read-write test, data wire test and address wire test and search for errors existedin the storage through step-by-step exclusive method which makes test results more accurately. Besides, the invention only needs utilizing the initial address and the final address to comprehensivelydetect whether the data wire has problems; and for detecting the address wire, the comprehensive test can be performed only by utilizing very few address locations. Moreover, through special arrangement of test data, test data groups and test address blocks, specific data wire and address wire on which an error is existed can be pointed out and the error can be reported in time, thereby greatly improving detection efficiency.

Description

technical field [0001] The invention relates to the technical field of detecting memory peripheral circuits and memory quality, in particular to a detection method for memory circuit short circuit and disconnection and unit. Background technique [0002] Memory has been widely used in various products in the computer, electronics, and communication industries. Moreover, memory has high requirements for production technology (such as mounting technology). In the case of human factors (such as soldering errors, causing problems such as false soldering and adhesion), the memory often has short-circuit or open-circuit problems, which has a great impact on the product and often makes the product unable to operate normally. However, such problems are usually difficult to judge by the naked eye of technicians, and software problems caused by such hardware problems are not easy to locate and difficult to reproduce. [0003] The Chinese patent CN200410069098.2 "Detection method of f...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/00
Inventor 杜军黄海欢
Owner SHENZHEN COSHIP ELECTRONICS CO LTD
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