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Reduction processing method for parallel computer, and parallel computer

A processing method and computer technology, applied in the direction of computers, digital computer components, and various digital computer combinations, etc., can solve the problems of speeding up the reduction processing speed, no operation, limited nodes, etc., to shorten the transmission time, reduce the number of Effects of time and high-speed transfer processing

Inactive Publication Date: 2007-09-19
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] But with the previous technique, two nodes perform calculations after the first transmission, and the other two nodes only send data without performing calculations
Therefore, the number of nodes to perform operations is limited, and it is difficult to speed up the reduction process

Method used

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  • Reduction processing method for parallel computer, and parallel computer
  • Reduction processing method for parallel computer, and parallel computer
  • Reduction processing method for parallel computer, and parallel computer

Examples

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no. 1 example

[0046] Fig. 5 shows its reduction process according to the first embodiment of the present invention, Fig. 6 shows its data flow according to the reduction process in Fig. 5, and Fig. 7 shows its node transmission / As a flowchart of calculation processing, FIG. 8 is a flowchart of node summarization processing according to the first embodiment in FIG. 5 .

[0047] As shown in Figure 5, each node 10, 11, 12 and 13 divides the data block to be reduced into n parts, and transmits it to each node 10, 11, 12 and 13. The nodes 10, 11, 12 and 13 that have received the data aggregate their respective 1 / n data and perform operations as indicated in (1). Then each node 11, 12, and 13 transmits each calculation result to node 10, and node 10 summarizes the received result and the result of node 10's own calculation, as shown by the mark (2).

[0048] Referring to FIG. 6, description will be made using the same amount of data as shown in FIG. 12 as an example. In these figures, D0-D3, ...

no. 2 example

[0067] Fig. 9 shows a second embodiment of the reduction processing procedure of the second embodiment of the present invention. In the first embodiment, the operation results are summarized by an aggregation node 10, but other nodes must know the operation results in some cases. However, in the case of this implementation, all nodes can obtain calculation results during the second data transmission process, so all nodes can share the calculation results.

[0068] FIG. 9 shows the second data transmission process in FIG. 6 , and the first transmission / operation processing is the same as that shown in FIG. 6 .

[0069] As shown in FIG. 9, the operation result of each node is transmitted to each node 10, 11, 12, and 13 in the second transmission. In other words, the operation results G0123-I0123, J0123-L0123, and M0123-O0123 are transmitted from the network adapters 14A, 14B, and 14C of each node 10, 11, 12, and 13 to the nodes 10, 11, 12, and 13.

[0070] Also in this example...

no. 3 example

[0073] Fig. 10 shows the broadcast processing procedure according to the third embodiment of the present invention. In this example, the parallel computer has 16 nodes, 0-15, each node has three network adapters, wherein the reduction process is performed on nodes 0-15. The nodes in Fig. 10 that are the same as those in Fig. 1 and Fig. 5 are indicated by the same serial numbers.

[0074] First, 16 nodes are divided into 4 node groups, 0-3, 4-7, 8-11, and 12-15, and the same processing as the first embodiment is performed for each node group.

[0075] In other words, in each node group 0-3, 4-7, 8-11, and 12-15, nodes 0-3, 4-7, 8-11, and 12-15 split the data to be reduced is part n and transmits data to each node 0-3, 4-7, 8-11 and 12-15 in the node group through separate network adapters 14A, 14B and 14C. Nodes 0-3, 4-7, 8-11 and 12-15 that have received the data aggregate their respective 1 / n data and perform operations as indicated in (1). Then each node 1-3, 5-7, 9-11, a...

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Abstract

A parallel computer operates to reduce data held by a plurality of nodes. Each node constituting a parallel computer transfers the data divided into n to other nodes, and each node summarizes the respective 1 / n data and operates, then a plurality of nodes transfer the respective operation result to a summarizing node. Since all the nodes execute operation for divided data respectively, reduction processing time can be decreased. And more nodes (network adapters) can participate in data transfer through the first and second data transfers, high-speed transfer processing can therefore be implemented, and transfer time can be decreased.

Description

technical field [0001] The present invention relates to a reduction processing method (reduction processing method) of a parallel computer and a parallel computer, in which a plurality of computer nodes are connected through a network, wherein the calculation results of the plurality of computer nodes are summarized and reduced, the present invention More specifically, it relates to a reduction processing method and a parallel computer for a parallel computer that efficiently performs reduction processing by using a plurality of network adapters installed on each computer node. Background technique [0002] With the demand for higher processing speed of computer systems, parallel computers in which a plurality of nodes including computers are installed and connected to each other through a network are increasingly used. For example, in the field of parallel computing, data is calculated in parallel by multiple nodes and the processed data is exchanged with each other through...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/163G06F15/16H04L12/28H04L29/02G06F15/173
CPCG06F15/17381G06F13/00G06F15/16G06F15/173
Inventor 稻垣淳一小薮正夫
Owner FUJITSU LTD
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