Interleaving scheme of 32APSK system for low-density checksum coding

Abstract

This invention provides a method for interleaving bits through low density odd-even check coding (LDPC), which can get wanted compromise between error performance and error flat-bottom provided by the LDPC effectively.

Description

technical field [0001] The present invention relates to the interleaving of Low Density Parity Check ("LDPC") coded bits in a 32APSK modulation system. Specifically, by allocating the bits of the modulation symbols based on different bit degrees, a desired compromise can be effectively found between the error performance provided by the used LDPC code and the error floor. Background technique [0002] In "Bit-Reliability Mapping in LDPC-Codes Modulation systems," by Yan Li and William Ryan, published in IEEE Communications Letters, vol.9, no.1, January 2005 , the authors investigate the performance of modulation systems using LDPC encoding of 8PSK. With the proposed bit reliability mapping strategy, a performance improvement of about 0.15dB over the non-interleaved scheme is achieved. The authors also explain the reason for this improvement using an analysis tool called the EXIT graph. In this interleaving scheme, an interleaving method is considered, and it is shown that...

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Problems solved by technology

LDPC decoder systems typically exhibit a rapid decrease in error probability as the quality of the input signal increases

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