Interweaving scheme of QPSK/8PSK system for low-density checksum coding

A technology for coding bits and modulation systems, applied in error detection coding using multi-bit parity bits, phase modulation carrier system, error correction/detection using block codes, etc. Effects of reduced transmission power, good threshold characteristics

Inactive Publication Date: 2008-03-26
ACAD OF BROADCASTING SCI SARFT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

LDPC decoder systems typically exhibit a rapid decrease in error probability as the quality of the input signal increases

Method used

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  • Interweaving scheme of QPSK/8PSK system for low-density checksum coding
  • Interweaving scheme of QPSK/8PSK system for low-density checksum coding
  • Interweaving scheme of QPSK/8PSK system for low-density checksum coding

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Embodiment Construction

[0033] Although the invention is described in terms of LDPC codes, it should be realized that the bit labeling approach can be used in other codes as well. Additionally, this method can be implemented in non-encoded systems.

[0034] FIG. 4 is a diagram of a communication system with an interleaver employing LDPC codes according to an embodiment of the present invention. The communication system includes a transmitter 401 that generates a signal waveform that is transmitted over a communication channel 402 to a receiver 403 . Transmitter 401 includes an information source that generates a discrete set of possible information. These pieces of information all correspond to a certain signal waveform. The waveform enters channel 402 and is degraded by noise. LDPC codes are employed to reduce the interference introduced by channel 402. For a particular LDPC code and desired error floor level, an interleaver and a deinterleaver are used in the transmitter 401 and receiver 403, r...

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Abstract

The invention provides a method for interlacing bit coded by low density parity check (LDPC) in QPSK / 8PSK modulation system. Determining bit of modulation code elements based on different bit degree distribution can effectively compromise error performance and error floors provided by a LDPC code in use.

Description

technical field [0001] The present invention relates to the interleaving of Low Density Parity Check ("LDPC") coded bits in a Quadrature Phase Shift Keying ("QPSK") / 8PSK modulation system. Specifically, by allocating the bits of the modulation symbols based on different bit degrees, a desired compromise can be effectively found between the error performance provided by the used LDPC code and the error floor. Background technique [0002] In "Bit-Reliability Mapping in LDPC-Codes Modulation systems," by Yan Li and William Ryan, published in IEEE Communications Letters, vol.9, no.1, January 2005 , the authors investigate the performance of modulation systems using LDPC encoding of 8PSK. With the proposed bit reliability mapping strategy, a performance improvement of about 0.15dB over the non-interleaved scheme is achieved. The authors also explain the reason for this improvement using an analysis tool called the EXIT graph. In this interleaving scheme, an interleaving metho...

Claims

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Application Information

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IPC IPC(8): H04L27/18H03M13/11H03M13/27
Inventor 杨明张军坦吴智勇孙凤文
Owner ACAD OF BROADCASTING SCI SARFT
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