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Heat sinking type chip packaging technology and constitution

A chip packaging and heat dissipation technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of complex technical content, high machine cost and mold cost, waste of production cost, etc.

Active Publication Date: 2010-09-15
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] It is known that a filling molding process is required in the packaging step to seal and protect the chip, which requires high machine costs and mold costs, and the technical content involved is complicated. However, the high cost and technology are not consistent with the packaged products. The quality is not directly proportional, resulting in a waste of production costs

Method used

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  • Heat sinking type chip packaging technology and constitution
  • Heat sinking type chip packaging technology and constitution
  • Heat sinking type chip packaging technology and constitution

Examples

Experimental program
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Embodiment Construction

[0049] see Figure 1A to Figure 1G According to a specific embodiment of the present invention, a heat-dissipating chip packaging process is disclosed. First, please refer to Figure 1A , provide a substrate strip 10, the substrate strip 10 includes a plurality of substrate units 110, each substrate unit 110 has an upper surface 111, a lower surface 112, a plurality of first connection pads 113 and a plurality of second connection pads 114, the first A connection pad 113 is formed on the upper surface 111, and the second connection pad 114 is formed on the lower surface 112; then, please refer to Figure 1B A plurality of chips 120 are arranged on the upper surface 111 of the substrate unit 110, each chip 120 has an active surface 121, a back surface 122 and a plurality of bumps 123, and the bumps 123 of the chip 120 are electrically connected to the substrate unit 110 of the first connection pad 113; after that, see Figure 1C , forming an underfill 130 (underfill) on the up...

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PUM

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Abstract

The invention discloses a packaging process of radiation type chips and a structure thereof. The packaging process of radiation type chips at least comprises the following steps of firstly, providing a base batten containing at least one batten unit, then arranging at least one chip on the upper surface of the batten unit which is electrically connected with the chip, further, proving prepreg material and a radiation metal layer, wherein the radiation metal layer is arranged on a first surface of the prepreg material and a second surface of the prepreg material points at the chip, and lastly,press-fitting the prepreg material and the batten unit to enable the prepreg material to be covered on the chip.

Description

technical field [0001] The invention relates to a packaging process, in particular to a heat dissipation chip packaging process. Background technique [0002] It is known that a filling molding process is required in the packaging step to seal and protect the chip, which requires high machine costs and mold costs, and the technical content involved is complicated. However, the high cost and technology are not consistent with the packaged products. The quality is not directly proportional, resulting in waste of production costs. Contents of the invention [0003] The main purpose of the present invention is to provide a heat-dissipating chip packaging process. First, a substrate strip is provided, and the substrate strip includes at least one substrate unit; then, a chip is arranged on the substrate unit, and a plurality of bumps of the chip are electrically connected. A plurality of connection pads of the substrate unit; after that, a first prepreg and a heat dissipation ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56H01L23/36H01L23/31
CPCH01L24/97H01L23/552H01L2224/73204H01L2224/16225H01L2224/97H01L2224/73265H01L2224/48227H01L2224/32225H01L24/73
Inventor 唐和明赵兴华李明锦黄泰源刘昭源黄詠政李德章高仁杰陈昭雄
Owner ADVANCED SEMICON ENG INC