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Method for controlling the 'first-to-melt' region in a PCM cell and devices obtained thereof

A technology of central area and memory unit, which is applied in the direction of electrical components, instruments, static memory, etc., and can solve the problems of increasing change and reducing the thickness of phase change film, etc.

Active Publication Date: 2008-07-23
NXP BV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Reducing the thickness of the phase change film by etching as described in the Haring Bolivar article is also not a well controlled process and will increase the variation

Method used

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  • Method for controlling the 'first-to-melt' region in a PCM cell and devices obtained thereof
  • Method for controlling the 'first-to-melt' region in a PCM cell and devices obtained thereof
  • Method for controlling the 'first-to-melt' region in a PCM cell and devices obtained thereof

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Embodiment Construction

[0018] The process according to the invention is implemented as follows. The geometrically long line elements are first fabricated by depositing a layer of phase change material (PCM) and subsequently patterning this layer (Fig. 3). This layer can be patterned in an hourglass shape similar to the structure shown in FIG. 1 . Alternatively, a hard mask such as a TiW layer can be used to pattern this layer. This hard mask is formed on and patterned over the PCM layer. Next, the patterned hard mask is used to pattern the underlying first PCM layer. As shown in FIG. 3, the width W1 of the first mask used to pattern the PCM layer is critical from a process point of view as it is a controlled minimum dimension.

[0019] In a second step, the material properties of the PCM layer are locally altered using a second mask. The material in this region has increased resistivity compared to the unaltered material without substantially changing the PCM properties of the PCM layer. For th...

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Abstract

A phase-change-material memory cell is provided. The cell comprises at least one patterned layer of a phase-change material, and is characterized in that this patterned layer comprises at least two regions having different resistivities. If the resistivity of the phase-change material is higher in a well- defined area with limited dimensions (''hot spot'') than outside this area, then, for a given current flow between the electrodes, advantageously more Joule heat will be generated within this area compared to the area of the phase- change material where the resistivity is lower.

Description

technical field [0001] The invention relates to a phase change memory unit. Background technique [0002] As in the article "Low-cost and nanoscale non-volatile memory concept for future silicon chips" by Martijn H.R. Lankhorst, Bas W.S.M.M. Ketelaars and R.A.M. Wolters in Nature Materials (published online on March 13, 2005) and P.Haring Bolivar, F. Merget, D.-H.Kim, B.Hadam and H.kurz in the EPCOS-2004 conference "Lateral design for phasechange random access memory cells with low-current consumption" (see www.epcos.org / pdf_2004 / 19paper_haringbolivar .pdf), a standard phase-change memory (PCM) lateral / line-type cell is designed with geometric constraints in the form of an hourglass pattern structure. As shown in Figure 1, a current I will flow between the outer contacts or electrodes composed of Al and the WTi / TiN stack, through the central part formed in the phase change material. This shape of the memory cell results in a localized increase in current density, resulting...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/02H10N80/00
CPCH01L45/1675H01L45/06H01L45/165H01L45/144H01L45/1226G11C13/0004H10N70/823H10N70/231H10N70/8828H10N70/043H10N70/063
Inventor 迪尔克·武泰卢多维克·古朱迪思·利松尼托马斯·吉勒
Owner NXP BV