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Device, system and method for thread communication and synchronization

A thread and device technology, applied in the field of microprocessor architecture, can solve problems such as difficult adjustment of multiple storage units, die area and power cost, and difficulty in software development.

Inactive Publication Date: 2012-05-30
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Existing technologies such as the above can be costly in terms of die area and power
Furthermore, these existing techniques may not be easily tuned when monitoring updates of multiple storage units, leading to software development challenges

Method used

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  • Device, system and method for thread communication and synchronization
  • Device, system and method for thread communication and synchronization
  • Device, system and method for thread communication and synchronization

Examples

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Embodiment Construction

[0047] Embodiments of the invention relate to microprocessor architectures. More specifically, embodiments of the invention relate to the management of communication and synchronization between two or more threads of instructions executed by one or more microprocessors or microprocessor cores. At least one embodiment of the invention provides a mechanism for identifying, by a thread, which storage locations to notify if any other thread modifies a value stored in a set of storage locations. In one embodiment, the notification may be performed by a user-level interrupt / exception mechanism within the microprocessor, or by some other logic or software within the computing system. In one embodiment, inter-thread communication and synchronization is achieved by enabling threads to be notified of particular cache coherence events regarding cache lines accessed by one or more other threads.

[0048] Unlike some prior art inter-thread communication techniques, embodiments of the pres...

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Abstract

A technique for thread synchronization and communication. More particularly, embodiments of the invention pertain to managing communication and synchronization among two or more threads of instructions being executing by one or more microprocessors or microprocessor cores.

Description

technical field [0001] Embodiments of the invention relate to microprocessor architectures. More specifically, embodiments of the invention relate to the management of communication and synchronization between two or more threads executing within one or more microprocessors or microprocessor cores. Background technique [0002] Instructions within a modern computer program may be organized to be executed according to various strings of instructions, or "threads." Typically, threads of instructions executing within a processing resource utilize and / or generate a set of state information that is unique to, or at least associated with, a particular thread. However, threads may also share state information or other information, such as data to be manipulated by one or more threads, in which case it may be necessary to pass information from one thread to another. [0003] In a typical shared-memory microprocessor or processing system, threads exchange information through one th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/46
CPCG06F2209/543G06F12/0831G06F9/3004G06F9/542G06F9/3834G06F9/30087G06F12/0842G06F9/22G06F9/46G06F13/00
Inventor Q·雅各布森H·王J·沈P·哈默隆德
Owner INTEL CORP