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Method and apparatus for reducing power consumption of multiple-core symmetrical multiprocessing system

A technology of symmetric multiprocessing and system power consumption, which is applied in the direction of multi-programming device, data processing power supply, resource allocation, etc., can solve the problem of power consumption and achieve the effect of reducing system power consumption

Inactive Publication Date: 2009-05-20
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this way, since these CPUs are constantly executing system instructions, they will also consume power accordingly.

Method used

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  • Method and apparatus for reducing power consumption of multiple-core symmetrical multiprocessing system
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  • Method and apparatus for reducing power consumption of multiple-core symmetrical multiprocessing system

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Embodiment Construction

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings that are used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

[0019] like figure 1 As shown, the embodiment of the present invention provides a method for reducing power consumption of a multi-core symmetric multi-processing system, including:

[0020] Step 11, counting the current system load of the multi-core symmetric multi-processing system.

[0021] In this step, the current system load of the system can be counted in at least the following two ways: one is to count through an external control unit, and the other is to count through each CPU core itself.

[0022] In the first ...

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Abstract

The embodiment of the invention provides a method and a device for reducing power consumption of a multi-core symmetric multiprocessing system, which relate to symmetric multiprocessing technology. The method of the embodiment of the inversion adopts the technical proposal that the current system load of the multi-core symmetric multiprocessing system is calculated and compared with an idle threshold of the system load, and the number of operated CPU inner cores is reduced if the current system load is smaller than the idle threshold of the system load. The embodiment of the invention is mainly applied to the multi-core symmetric multiprocessing system.

Description

technical field [0001] The present invention relates to symmetric multi-processing technology, in particular to a method and device for reducing power consumption of a multi-core symmetric multi-processing (Symmetrical Multi-Processing, SMP) system. Background technique [0002] A multi-core processor refers to a processor product that includes multiple CPU cores in one chip. Compared with traditional single-core chips, multi-core processor technology can greatly improve system performance while maintaining the same frequency. Among them, the multi-core processor can be divided into two types: a homogeneous multi-core processor and a heterogeneous multi-core processor. The homogeneous multi-core processor means that the structures of the CPU cores are the same, and the heterogeneous multi-core processor means that the structures of the CPU cores are different. [0003] The symmetric multi-processing system refers to a group of CPUs assembled on a computer, and the memory s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/32G06F9/50
CPCY02B60/142Y02B60/167Y02D10/00
Inventor 智伟敏
Owner HUAWEI TECH CO LTD