Memory abnormal access positioning method and device

Abstract

The embodiment of the invention discloses a memory abnormal access positioning method and a device, wherein, the memory abnormal access positioning method comprises the following steps of: monitoring the memory in which the abnormal access occurs, and capturing an access behavior; acquiring an access command in accordance with the access behavior, and positioning the access behavior through the access command; analyzing the access command to obtain an analysis result; and taking the place of the access command to accomplish corresponding operations in accordance with the analysis result. By the embodiment of the invention, efficient positioning can be implemented on the memory abnormal access.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a method and device for locating abnormal memory access. Background technique [0002] MIPS (Microproces sor without Interlocked Pipeline Stages, a microprocessor without internal interlocking pipeline stage) is a CPU architecture, and a CPU using the MIPS architecture is called a MIPS CPU. MIPS CPU is widely used in broadband equipment, wireless network, portable game console, digital camera, digital TV and other fields. [0003] In the development and scheduling stage of MIPS CPU, there will be abnormal memory access problems. The so-called abnormal memory access means that during the running of the program, a certain instruction (or a certain piece of code) reads and writes the memory beyond the normal range of reading and writing. The memory that belongs to the normal read and write range has been modified, which is generally related to problems such as memory out-of-...

AI Technical Summary

Problems solved by technology

[0011] When the monitored memory address is accessed, the system will generate an exception. After the exception is processed and returned, the program will continue to execute the instruction that generated the exception, thus entering the exception again. This cycle repeats, and the system can only be reset, and the access instruction cannot be continued. capture and analysis

Simultaneously, because the probability that abnormal memory access phenomenon takes place is very low, and in practice, the access that is carried out to the memory address being monitored is normal access in most cases, at this moment, the instruction that analyzes and checks in the prior art is often They are all normal instructions, so it is impossible to effectively locate the illegal access instructions that cause abnormal memory access.

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