Method for designing multi-controller memory array

A storage array and design method technology, applied in digital transmission systems, electrical components, transmission systems, etc., can solve problems such as increased data communication load, inadaptability to multi-controller storage architecture, and reduced buffer pool utilization, to achieve enhanced operation Reliability and the effect of improving system redundancy

Inactive Publication Date: 2010-06-16
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
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  • Application Information

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Problems solved by technology

[0006] In a multi-controller system, if the controllers are still used to add their own buffers, the utilization rate of the buffer pool on each controller will be greatly reduced, the data communication load between the controllers will b

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  • Method for designing multi-controller memory array
  • Method for designing multi-controller memory array

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Embodiment Construction

[0016] Referring to the accompanying drawings, a specific example is used to describe the detailed process of realizing this system structure for the content of the present invention.

[0017] As described in the summary of the invention, the architecture of the present invention mainly includes: a cache module unit, a controller module unit, a cache exchange unit, a storage unit including a FC switch and a disk cabinet, a power supply and a cooling unit.

[0018] The resource modules mentioned in this architecture mainly include controller unit, buffer exchange unit and cache unit. The controller unit includes a host interface that provides external storage services such as Ethernet, FC interface, management configuration interface such as RS-232, a network interface connected to the cache switching unit, a RAID XOR computing unit, and a disk controller. After the host's LUN read and write request reaches the controller, the protocol is analyzed to separate the SCSI data and ...

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Abstract

The invention provides a method for designing a multi-controller memory array. In the method, more than two controllers are arranged in a system to monitor the states of failover and a hot plugging function in real time, and the system performance is approximately linearly improved with the increase of the number of the controllers. A module adopted in the designing process comprises a controller unit, a switching unit, a data caching unit, a memory cell and a power supply radiating unit, wherein the data caching unit is an independent functional unit not attached to the controllers; interconnectivity and sharing are realized between the controller unit and the caching unit through a high-speed network unit and various configuration management and status information; and flexible configuration can be performed, such as adding or deleting components in the system on line, and the like. The flexibility is embodied in that the caching unit is independent from the controllers to organize an independent memory space, and access control is performed through a network interconnection unit, so the design difficulty of the system is improved, and the reliability is increased.

Description

technical field [0001] The invention relates to a computer application technology, in particular to a highly reliable and high-performance multi-controller storage array architecture design method. Background technique [0002] The storage disk array system is developed with the development of computer technology, especially with the increasing scope of information application and the rise of Internet technology, the data carrying capacity is increasing, and the disk array technology is also moving towards large capacity and high reliability. direction development. The initial form of disk array was low-end DAS (Direct Attached Storage) products. With the development of technology and business needs, SAN (Network Storage) gradually entered the mainstream application. Compared with DAS products, SAN devices are more intelligent, easy to manage, high performance, It supports more high-end application features, and its application is more flexible. [0003] Regardless of whet...

Claims

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Application Information

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IPC IPC(8): G06F3/06H04L12/56H04L12/861
Inventor 葛峰
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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