Sequence arranging method for current source switch array of digital-analog converter

Abstract

The invention relates to a sequence arranging method for a current source switch array of a digital-analog converter, and the switch array comprises (2n)2 current source switches arranged in the (2n) multiplied by (2n) array from, wherein n is an even number; and the sequence arranging method comprises the one-dimensional direction arranging step and the two-dimensional direction arranging step, wherein the one-dimensional direction arranging step is as follows: arranging the sequence of the 2n current source switches in each rack according to the hierarchical symmetrical switch sequence. The current source switch array adopting the sequence arranging method can effectively inhibit gradient error and symmetry error, namely reduce static error of the digital-analog converter and further ensure the high precision of the digital-analog converter.

Description

technical field [0001] The invention relates to the field of electric energy measurement, in particular to a sequence arrangement method of a current source switch array of a digital-to-analog converter. Background technique [0002] For high-precision DAC (that is, digital-to-analog converter), the error prevention and correction of the circuit are very important. Taking a 15-bit DAC with an output current of 30mA as an example, the minimum analog current that can be resolved is: It can be seen that, for the DAC, even a small error will cause the dynamic and static performance of the output analog signal to deteriorate. The error of DAC can generally be divided into two categories: the first category is called static error, which exists in the process of static operation, and has nothing to do with time, and has nothing to do with the working frequency range of DAC; the second category is called dynamic error, this kind of error The performance of the DAC will become ver...

AI Technical Summary

Problems solved by technology

In the prior art, generally according to the traditional symmetrical switching sequence shown in Figure 1(a), the unit current source switches symmetrically located on both sides of the center are turned on. In this way, the gradient error caused by a unit current source can be It is offset by the error generated by another unit current source placed symmetrically with it, that is, the gradient error of the unit current source can be compensated; for example, when the digital signal input is 4, the sequence number is 1, 2, 3, 4 The unit current source Switching action, the unit current sources 1, 2, 3, and 4 controlled by them will be turned on. It can be seen from Fig. However, it can be seen from Figure 1(c) that the symmetrical error generated by the unit current source cannot be canceled, resulting in poor INL

It can be seen that the sequence arrangement of the existing current source switches cannot meet the accuracy requirements of the DAC.

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