Copper subsequent interconnection technique

Abstract

The invention relates to the field of micro-electronics, particularly a copper subsequent interconnection technique. In the copper subsequent interconnection technique, a hard mask technology is utilized to enhance the etching resistance of the non-etching region in the subsequent etching process and reduce the drain current increase caused by the decreased thickness of the insulating material between metal conductors on the premise of keeping the chip area unchanged, thereby enhancing the yield of the device.

Description

technical field [0001] The invention relates to the field of microelectronics, in particular to a copper back-channel interconnection process. Background technique [0002] With the rapid development of nanofabrication technology, the feature size of transistors has entered the nanometer level. Improving the performance of current mainstream silicon CMOS devices through proportional reduction methods is subject to more and more physical and technological constraints. Therefore, the development of silicon technology compatible New materials and new structures have become important topics at present. [0003] With the continuous improvement of integrated circuit manufacturing technology and the continuous shrinking of line width in lithography technology, the area of ​​semiconductor devices is becoming smaller and smaller. The layout of semiconductors has evolved from ordinary single-function separation devices to integrated high-density multi-functional Integrated circuit; f...

AI Technical Summary

Problems solved by technology

Improving the resolution requires further reducing the film thickness of the photoresist, which in turn leads to a decrease in the etching resistance of the film, which in turn leads to a series of product qualification and reliability problems

[0006] In the traditional Damascus craft, such as figure 1 As shown, the method of photolithography and etching direct forming is generally used to realize Damascus copp

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