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Nonvolatile memory with enhanced efficiency to address asymmetric NVM cells

A magnetic layer, access transistor technology, used in static memory, read-only memory, digital memory information, etc.

Active Publication Date: 2012-07-11
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Higher current requirements also dictate the size of the NMOS transistors and limit the scalability of the MRAM cell to smaller geometries

Method used

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  • Nonvolatile memory with enhanced efficiency to address asymmetric NVM cells
  • Nonvolatile memory with enhanced efficiency to address asymmetric NVM cells
  • Nonvolatile memory with enhanced efficiency to address asymmetric NVM cells

Examples

Experimental program
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Embodiment Construction

[0013] Overview

[0014] The present disclosure relates to an STT-MRAM cell, which incorporates a PMOS or p-type transistor as an access transistor to control the driving current provided to the MTJ or magnetic storage component of the STT-MRAM cell. MTJ switches between two magnetoresistive states based on the drive current provided by the PMOS transistor. In one example, the MTJ requires a higher current level than the amount of current required to transition from the first state to the second state to transition from the first state to the second state.

[0015] At higher current states or transitions, the MTJ operates under sub-optimal conditions due to the higher current levels that may cause damage to the MTJ. However, PMOS transistors under higher current conditions are minimally affected by the receptor effect, which relies on the voltage difference between the source of the transistor and the substrate. Therefore, during the higher current transition period of the MTJ, ...

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PUM

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Abstract

The invention relates to a nonvolatile memory with enhanced efficiency to address asymmetric NVM cells. This application describes embodiments of MRAM cells that utilize a PMOS transistor as an access transistor. The MRAM cells are configured to mitigate the effects of applying asymmetric current loads to transition a Magnetic-Tunnel Junction of the MRAM cell between magnetoresistive states.

Description

Background technique [0001] Non-volatile memory (NVM) cells retain stored information without receiving constant or permanent power. NVM cells can provide significant power savings for electronic systems that do not require or provide constant power to the cell. Initialization time for electronic systems can also be reduced via NVM. For example, instructions stored in NVM are ready to execute and do not need to be recreated or reloaded during the initialization process. [0002] NVM cells typically store information in a digital format. For example, NVM cells store information as 0 or 1. Thus, NVM cells typically transition between a first state and a second state that reflect the digital format. The states may include charge states (eg, flash memory) or magnetic states (eg, spin torque transfer magnetoresistive random access memory (STT-RAM)). [0003] Typically, an STT-MRAM cell includes a magnetic tunnel junction (MTJ) that acts as a storage structure for a bit of info...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/08G11C16/02H10N50/10
CPCG11C11/1659H01L43/08H01L27/228G11C11/1675G11C11/161H10B61/22H10N50/10
Inventor A.奈伊
Owner INFINEON TECH AG
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