A Method of Completing Integrated Function of Chip Design Using Form

Abstract

A method for completing chip design integrated functions by form includes: manually inputting content of a sub-module form and an integrated module form; reading in the content of the sub-module form and the integrated module form; and automatically generating a sub-module source code and an integrated module source code according to mapping relation between predefined content of the sub-module form and the integrated module form and source codes of the sub-module form and the integrated module form. By the aid of the method and software script, integrating efficiency can be greatly improved, consistency of a file with the source codes and different modules is guaranteed, and the method also has designing and verifying functions at the same time.

Description

technical field [0001] The invention relates to a method for completing chip design and integration functions by using tables. Background technique [0002] Chip design has reached the scale of tens of millions or even hundreds of millions of transistors, which must be divided into multiple modules and completed by multiple people. In its process, a step is inevitably involved: connecting the sub-modules together, ie integration. Traditionally, integration has been done by manually entering source code. However, due to the huge scale, the number of sub-modules is often hundreds, each of which may have thousands of interfaces, and all connections may exceed tens of thousands. The progress of the project often requires temporary additions, deletions and modifications. The workload is huge, error-prone, and inheritability is poor. Therefore, an efficient and reliable integration method is urgently needed. [0003] Currently, the existing sub-modules and the top-level modules...

AI Technical Summary

Problems solved by technology

[0007] It can be seen that the existing manual integration has a huge workload, is extremely error-prone, and has poor inheritability.

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