Method and apparatus for monitoring interrupts during a power down event at a processor
A monitor and processor technology, applied in the direction of data processing power supply, digital data processing components, electrical digital data processing, etc., can solve the problem of interrupt loss and so on
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[0016] A processor is described that receives an interrupt from an interrupt source, such as another component in a system that requests use of the processor. The interrupt monitor receives interrupts and forwards them to the processor when the processor is powered on. When the processor is in a low power state (eg, powered down, standby, sleep, suspend, hibernate), the processor is isolated from incoming interrupts received at the interrupt monitor. In this case, the interrupt monitor stores interrupts pending at the processor before the processor entered the low power state and stores interrupts received while the processor was in the low power state. When the processor is powered on again after the low power state, the stored interrupts can be replayed at the interrupt controller so that the processor can receive incoming interrupts again.
[0017] see figure 1 , which discloses a particular illustrative embodiment of an apparatus to monitor for interruptions during a pow...
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