Instruction obtaining device for processor and processor with same

Abstract

The invention relates to an instruction obtaining device for a processor. The instruction obtaining device comprises an instruction caching unit, an instruction buffer unit, an instruction window and an instruction achieving logical unit, wherein the instruction caching unit is used for storing instructions and transmitting the instructions stored in the instruction caching unit to the instruction buffer unit in order; the instruction buffer unit is used for transmitting instructions needing to be executed at present and obtained by the instruction achieving logical unit at one time to the instruction window to be stored; the instruction achieving logical unit obtains the instructions from the instruction window, processes the instructions and outputs and executes the instructions; the instruction achieving logical unit also returns read pointers and write pointers of current execution instructions back to the instruction buffer unit. The invention further relates to a processor with the instruction obtaining device. The instruction obtaining device for the processor and the processor with the instruction obtaining device have the advantage of shortening instruction output time on the whole.

Description

technical field [0001] The present invention relates to a processor, and more specifically, relates to an instruction acquisition device used in a processor and a processor thereof. Background technique [0002] A typical instruction execution pipeline includes an instruction issue stage where it is necessary to check for data hazards before an instruction is known to be output. This check often complicates timing and can be time critical. In a super-scalar design, an instruction buffer unit that can fetch and store multiple instructions can reduce the above problems to some extent. However, in this case, the instruction obtained and stored not long ago needs to be read from the instruction buffer unit again, which takes a certain amount of time, especially in addressing. Therefore, although the structure of adding an instruction buffer unit makes the timing relatively simple and does not bring time criticality, it takes a long time to implement the instruction. Cont...

AI Technical Summary

Problems solved by technology

However, in this case, it is necessary to read out the instruction obtained and stored not long ago from the instruction buffer unit again, which takes a certain amount of time, especially in addressing.

Therefore, although the structure of adding an instruction buffer unit makes the timing relatively simple and does not bring time criticality, it takes a long time to implement the instruction.

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