A kind of shift register, gate drive circuit and display device
A technology for shift registers and gates, which is applied in the field of gate drive circuits, display devices, and shift registers, and can solve problems such as unstable output voltages
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
example 1
[0120] by Figure 3b The structure of the shift register shown is taken as an example to describe its working process, in which Figure 3b In the shift register shown, all transistors are P-type transistors, and each P-type transistor is cut off under the action of high potential and turned on under the action of low potential; the first DC source is a high potential DC source, and the second DC source It is a low-potential DC source; the corresponding input and output timing diagram is as follows Figure 2a shown. Specifically, choose the Figure 2a The three stages of T1, T2 and T3 in the input and output timing diagram shown.
[0121] In the T1 stage, Input=0, CK=0, CB=1. Since CK=0, the first transistor T1, the third transistor T3, the seventh transistor T7 and the eleventh transistor T11 are all turned on; since the first transistor T1 is turned on, Input=0, so the potential of the first node A is Low potential; because the potential of the first node A is low potent...
example 2
[0127] by Figure 4b The structure of the shift register shown is taken as an example to describe its working process, in which Figure 4b In the shift register shown, all transistors are N-type transistors, each N-type transistor is cut off under the action of low potential, and is turned on under the action of high potential; the first DC source is a low potential DC source, and the second DC source It is a high-potential DC source; the corresponding input and output timing diagram is as follows Figure 2b shown. Specifically, choose the Figure 2b The three stages of T1, T2 and T3 in the input and output timing diagram shown.
[0128] In the T1 stage, Input=1, CK=1, CB=0. Since CK=1, the first transistor T1, the third transistor T3, the seventh transistor T7 and the eleventh transistor T11 are all turned on; since the first transistor T1 is turned on, Input=1, so the potential of the first node A is High potential; because the potential of the first node A is a high po...
example 3
[0134] by Figure 5a The structure of the shift register shown is taken as an example to describe its working process, in which Figure 5a In the shift register shown, except for the thirteenth transistor which is an N-type transistor, all other transistors are P-type transistors. N-type transistors are cut off under the action of low potential and turned on under the action of high potential; each P-type transistor is turned off under the action of high potential and turned on under the action of low potential; the first DC source is a high potential DC source, and the second The DC source is a low-potential DC source; the corresponding input and output timing diagrams are shown in Figure 2a shown. Specifically, choose the Figure 2a The three stages of T1, T2 and T3 in the input and output timing diagram shown.
[0135] In the T1 stage, Input=0, CK=0, CB=1. Because CK=0, both the first transistor T1 and the third transistor T3 are turned on; because the first transisto...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More