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Planar display panel

A flat-panel display, panel technology, applied in static indicators, instruments, etc., to reduce the effect of the difference

Active Publication Date: 2015-01-21
CHINA STAR OPTOELECTRONICS INT HK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the pixel circuits P5, P4, and P1 are respectively affected by different degrees of feedthrough effects, even if you want to compensate the stored data potential, you cannot simply achieve the goal

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0037] Please refer to figure 2 , Which is a circuit block diagram of a flat panel display according to an embodiment of the invention. In this embodiment, the flat panel display 20 includes data lines D1 and D2, gate lines G1, G2, G3, and G4, gate guide lines TG1, TG2, TG3, TG4, and a display area 22. As shown in the figure, the gate lines G1 to G4 extend along the direction of the coordinate axis X, and the data lines D1 and D2 and the gate guide lines TG1 to TG4 extend along the direction of the coordinate axis Y. Furthermore, each gate guide line TG1, TG2, TG3, and TG4 is electrically coupled to a corresponding gate line G1, G2, G3, and G4, so that the gate guide lines TG1, TG2, TG3, and TG4 can be The potentials of the signals transmitted in the corresponding gate lines G1, G2, G3, and G4 are respectively controlled. In addition, in order to facilitate the control of the displayed results, the gate lines G1 to G4, the data lines D1, D2, and the gate guide lines TG1 to TG...

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PUM

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Abstract

A planar display panel comprises multiple gate lines, multiple data lines, multiple gate guide lines, and a display region, wherein one gate guide line is electrically coupled to one corresponding gate line; the display region comprises multiple pixel modules; each pixel module comprises a first pixel unit and a second pixel unit; each first pixel unit is electrically coupled to a first preset data line and a first preset gate line; each second pixel unit is electrically coupled to the first preset gate line and a second preset gate line and electrically coupled to the first preset data line through the corresponding first pixel unit; and each second pixel unit determines whether to receive the electric potential of the second preset gate line or not according to the electric potential of the first preset gate line, and determines whether to receive data transmitted from the first data line or not according to the electric potential received by the second preset gate line.

Description

Technical field [0001] The present invention relates to a flat display panel, and particularly relates to a flat display panel suitable for a narrow frame design. Background technique [0002] With the rapid development of flat-panel display technology, in order to increase the viewing area, the technology of reducing the width of the flat-panel display frame is constantly being introduced. Please refer to figure 1 , Which is a circuit diagram of Tracking Gate Line in Pixel used in the background art. The circuit of this technology does not need to provide fan out connection circuits on both sides of the panel, nor does it need to provide shift registers on both sides of the panel, so the width of the frame on both sides of the panel can be minimized. [0003] However, as figure 1 As shown, in order to control the pixel circuits P1, P2, and P3, the potentials of the gate lines G1, G2, and G3 must be controlled respectively. In this regard, the gate guide line TG1 is electrically ...

Claims

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Application Information

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IPC IPC(8): G09G3/20
CPCG09G3/20G09G3/3607G09G3/3648G09G3/3659G09G2320/0219
Inventor 廖伟见
Owner CHINA STAR OPTOELECTRONICS INT HK