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Manufacturing method for alignment and conduction of back surface of semi-conductor

A technology of backside alignment and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, photoplate-making process of patterned surface, and original parts for photomechanical processing, etc., can solve problems such as poor alignment of semiconductor backside process, and achieve improvement Alignment effect, effect of preventing backside contamination

Active Publication Date: 2015-04-29
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method can improve the problem of poor alignment of the semiconductor backside process, and can also be used as a conductive via

Method used

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  • Manufacturing method for alignment and conduction of back surface of semi-conductor
  • Manufacturing method for alignment and conduction of back surface of semi-conductor
  • Manufacturing method for alignment and conduction of back surface of semi-conductor

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Embodiment Construction

[0041] The manufacturing method applied to semiconductor back alignment and conduction of the present invention comprises the steps of:

[0042] 1) Growing a light-transmitting film layer 25 on the back of the provided semiconductor (such as figure 2 shown);

[0043] Among them, semiconductors include: single wafers, semiconductor multi-chips, or electronic components with semiconductor properties; where, electronic components with semiconductor properties include: electronic components with semiconductor processes or semiconductor components, etc.; figure 2 The semiconductor employed in is a semiconductor component 20;

[0044] The light-transmitting film layer 25 is a film layer with good light transmittance, and the etch rate of the film layer is different from the material of the semiconductor itself (especially has a large difference) and has good insulation properties, such as It can be composed of one or more light-transmitting materials that satisfy the etch rate o...

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Abstract

The invention discloses a manufacturing method for alignment and conduction of a back surface of a semi-conductor. The method comprises the following steps: (1), a light-pervious film layer grows on the back surface of the provided semi-conductor; (2), photoetching marks are made on the front of the semi-conductor with a photoetching process; (3), the photoetching marks in the step (2) are etched with an etching process until a part of the light-pervious film layer growing in the step (1) as a stopping layer is etched, and the etched photoetching marks are formed; (4), the etched photoetching marks are filled with materials, so that the photoetching marks used for the back surface are formed; (5), surface treatment is performed on the front of the semi-conductor, and a wafer carrier is bonded; (6), a back surface process is used for local fabrication processing, and the photoetching mark used for electric conduction is opened; (7), the photoetching mark used for electric conduction is filled with a metal material, and the metal material on a surface is treated, so that no metal is left on the light-pervious film layer on the back surface. The manufacturing method can effectively reduce influences of alignment in the back surface process, avoids back surface pollution and can also be used for producing safe electric conductive through holes.

Description

technical field [0001] The invention relates to a semiconductor manufacturing method in the field of microelectronic chip manufacturing, in particular to a manufacturing method applied to semiconductor back alignment and conduction. Background technique [0002] In the semiconductor manufacturing process of some special processes, the alignment problem is often a difficult problem that must be improved, especially in the semiconductor backside process. [0003] The existing lithography marks on the back are made directly on the front of the semiconductor by lithography; then either directly cut through these lithography marks, or etch these lithography marks to a certain depth, that is, do not cut through ; Second, fill some material in these marks; then do surface treatment on the front of the semiconductor, bond the wafer carrier, and then perform the subsequent back process. Among them, the etched photolithographic mark can be directly used for the alignment of the backs...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/768G03F1/42H01L21/266
Inventor 李伟峰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP