Fabrication method applied to semiconductor back alignment and conduction
A technology of backside alignment and fabrication method, which is applied in semiconductor/solid-state device manufacturing, photoengraving process of patterned surface, and originals for optomechanical processing, etc. Alignment influence, effect of preventing backside contamination
Active Publication Date: 2017-08-08
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
This method can improve the problem of poor alignment of the semiconductor backside process, and can also be used as a conductive via
Method used
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Embodiment Construction
[0041] The manufacturing method applied to semiconductor back alignment and conduction of the present invention comprises the steps of:
[0042] 1) Growing a light-transmitting film layer 25 on the back of the provided semiconductor (such as figure 2 shown);
[0043] Among them, semiconductors include: single wafers, semiconductor multi-chips, or electronic components with semiconductor properties; where, electronic components with semiconductor properties include: electronic components with semiconductor processes or semiconductor components, etc.; figure 2 The semiconductor employed in is a semiconductor component 20;
[0044] The light-transmitting film layer 25 is a film layer with good light transmittance, and the etch rate of the film layer is different from the material of the semiconductor itself (especially has a large difference) and has good insulation properties, such as It can be composed of one or more light-transmitting materials that satisfy the etch rate o...
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Abstract
The invention discloses a manufacturing method applied to semiconductor backside alignment and conduction, comprising: 1) growing a light-transmitting film layer on the provided semiconductor backside; 2) making lithography marks on the front side of the semiconductor with a lithography process; 3. ) Using an etching process to etch the photolithographic mark in step 2) until the light-transmissive film layer grown in step 1) is used as a stop layer, and part of the light-transmissive film layer is etched away to form the photolithographic mark after etching; 4 ) In the photolithographic mark after etching, material filling is performed to form a photolithographic mark for the back; 5) Surface treatment is performed on the front side of the semiconductor, and the wafer carrier is bonded; Conductive photolithographic marks; 7) Conductive photolithographic marks are filled with metal materials, and the surface metal materials are treated to ensure that there is no metal residue on the light-transmitting film layer on the back. The invention can effectively improve the alignment influence in the back process, prevent the back pollution, and can also produce safe conductive through holes.
Description
technical field [0001] The invention relates to a semiconductor manufacturing method in the field of microelectronic chip manufacturing, in particular to a manufacturing method applied to semiconductor back alignment and conduction. Background technique [0002] In the semiconductor manufacturing process of some special processes, the alignment problem is often a difficult problem that must be improved, especially in the semiconductor backside process. [0003] The existing lithography marks on the back are made directly on the front of the semiconductor by lithography; then either directly cut through these lithography marks, or etch these lithography marks to a certain depth, that is, do not cut through ; Second, fill some material in these marks; then do surface treatment on the front of the semiconductor, bond the wafer carrier, and then perform the subsequent back process. Among them, the etched photolithographic mark can be directly used for the alignment of the backs...
Claims
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IPC IPC(8): H01L21/02H01L21/768G03F1/42H01L21/266
Inventor 李伟峰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP