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Task scheduling method and related non-transitory computer readable medium for dispatching task in multi-core processor system based at least partly on distribution of tasks sharing same data and/or accessing same memory address (ES)

A technology for multi-core processors and task scheduling, which is used in electrical digital data processing, computing, resource allocation, etc.

Inactive Publication Date: 2015-10-21
MEDIATEK INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the above cache coherency interconnect has coherency overhead when an L2 cache read miss or L2 cache write occurs

Method used

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  • Task scheduling method and related non-transitory computer readable medium for dispatching task in multi-core processor system based at least partly on distribution of tasks sharing same data and/or accessing same memory address (ES)
  • Task scheduling method and related non-transitory computer readable medium for dispatching task in multi-core processor system based at least partly on distribution of tasks sharing same data and/or accessing same memory address (ES)
  • Task scheduling method and related non-transitory computer readable medium for dispatching task in multi-core processor system based at least partly on distribution of tasks sharing same data and/or accessing same memory address (ES)

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Embodiment Construction

[0022] Certain terms are used in the description and claims to refer to particular elements. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Includes" mentioned throughout the specification and claims is an open term, so it should be interpreted as "including but not limited to". In addition, the term "coupled" herein includes any direct and indirect means of electrical connection. Therefore, if it is described that a device is coupled to another device, it means that the one device may be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means.

[0023] figure 1 is a schematic diagram of a multi-core processor system de...

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Abstract

A task scheduling method for a multi-core processor system includes at least the following steps: when a first task belongs to a thread group currently in the multi-core processor system, where the thread group has a plurality of tasks sharing same specific data and / or accessing same specific memory address (es), and the tasks comprise the first task and at least one second task, determining a target processor core in the multi-core processor system based at least partly on distribution of the at least one second task in at least one run queue of at least one processor core in the multi-core processor system, and dispatching the first task to a run queue of the target processor core.

Description

[0001] cross reference [0002] This application claims priority to US Provisional Patent Application Serial No. 61 / 904,072, filed November 14, 2013. The aforementioned US Provisional Patent Application is hereby incorporated by reference. technical field [0003] The embodiments disclosed in the present invention relate to a task scheduling scheme. In particular, the embodiments disclosed in the present invention relate to a task scheduling method for scheduling tasks (for example, common tasks) in a multi-core processor system (multi-core processor system) and related non-transitory computer readable media (non- transitory computer readable medium), wherein the above task scheduling method is based at least in part on the distribution of tasks sharing the same specific data and / or accessing the same specific memory addresses. Background technique [0004] Nowadays, due to the increasing demand for computing power, multi-core systems have become popular. Therefore, an o...

Claims

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Application Information

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IPC IPC(8): G06F9/50
CPCG06F9/50G06F9/5033G06F9/5016
Inventor 张雅婷陈家明林有明骆子仁杨东峰陈尹周宏霖
Owner MEDIATEK INC
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