Array substrate and display device

Abstract

The invention discloses an array substrate and a display device. A capacitance compensation film layer is arranged in a non-display region of the array substrate, wherein the capacitance compensation film layer and fanout wires are arranged on different layers. Direct-facing areas between the capacitance compensation film layer and all the fanout wires are gradually increased according to the sequence of length, from big to small, of the fanout wires, the direct-facing areas between the long fanout wires and the capacitance compensation film layer are relatively small, the direct-facing areas between the short fanout wires and the capacitance compensation film layer are relatively big, and then the products of resistance of the long fanout wires and corresponding compensation capacitance are approximately equal to those of resistance of the short fanout wires and corresponding compensation capacitance. Resistance difference can be reduced by means of the design scheme, it is ensured that the products of resistance of all the fanout wires and the corresponding compensation capacitance are approximately equal, the phenomenon that signals of the fanout wires are not uniform is improved, and the uniformity of picture display is promoted. It can be avoided that extra wiring space is additionally arranged, and the narrow-bezel requirement is guaranteed.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate and a display device. Background technique [0002] At present, the wiring span of the fanout area (fanout) is relatively large. When wiring from the driver IC to both sides, due to the different positions of the pixel units, the length of each fanout line in the fanout wiring may be different, resulting in a difference in resistance. The signal delay difference on the fan-out traces makes the signal uneven, which in turn affects the uniformity of the screen display; in the prior art, the length of all fan-out traces can be adjusted to be nearly equal by increasing the length of the fan-out traces, thereby reducing the resistance difference, but requires a larger wiring space, which affects the design of narrow borders. Contents of the invention [0003] Embodiments of the present invention provide an array substrate and a display device, which are ...

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Problems solved by technology

[0003] Embodiments of the present invention provide an array substrate and a display device, which are used to solve the problem of differences in signal delays on fan-out routings existing in the prior art on the basis of ensuring narrow borders

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