A method for layout and wiring of anti-single event reinforced circuit unit
An anti-single event, layout and wiring technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as difficulties in realizing circuit layout, improve the ability of anti-single event effect, accurate layout positioning, and enhance The effect of anti-radiation hardening effect
Active Publication Date: 2018-09-11
BEIJING MXTRONICS CORP +1
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Problems solved by technology
[0005] The technical problem of the present invention is: to overcome the deficiencies of the prior art, to provide a method for layout and wiring of anti-single particle hardening circuit unit, to solve the problem of difficult realization of circuit layout of complex anti-single particle hardening unit, and to improve the design efficiency of circuit layout and reliability
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[0031] The working process of the present invention will be further explained below in conjunction with the accompanying drawings.
[0032] Such as figure 1 As shown, a method for layout and wiring of an anti-single event reinforced circuit unit includes the following steps:
[0033] (1) Schematic diagram modularization: According to the separation requirements of sensitive nodes in the anti-single event hardened circuit, the schematic diagram of the anti-single event hardened circuit is modularized, that is, split into several modules with input and output ports, and the connections between modules The relationship is consistent with the split circuit;
[0034] The specific implementation of schematic diagram modularization is as follows:
[0035] (a) According to the distribution of sensitive nodes, split the overall circuit into modules greater than or equal to the number of sensitive nodes, and each module can only contain one sensitive node;
[0036] (b) Divide the is...
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The invention discloses a single-particle reinforcing-resistant circuit unit distributing and wiring method. The method comprises the following steps: carrying out schematic diagram module separation on a single-particle reinforcing-resistant circuit according to a separation requirement of single-particle sensitive nodes; carrying out layout design on each bottom-layer schematic diagram module; distributing under the premise that the separated distances between every two the sensitive nodes satisfy a single-particle reinforcing-resistant requirement; after unit distribution, carrying out layout wiring on the basis of the separated distribution layouts of the sensitive nodes and the connection relationship among the checked modules; and after carrying out layout design rule verification and layout-schematic diagram consistency verification, completing the distribution and wiring of the single-particle reinforcing-resistant circuit. According to the method disclosed in the invention, the difficulty of the single-particle reinforcing-resistant circuit in the layout realization process is solved, and the reliability and efficiency of the layout design of the single-particle reinforcing-resistant circuit are improved.
Description
technical field [0001] The invention relates to a layout and wiring method of a unit layout, in particular to a layout and wiring method of an anti-single particle reinforced circuit unit, which belongs to the technical field of anti-radiation design. Background technique [0002] The radiation produced by high-energy protons or high-energy neutrons hitting the atomic nucleus and the heavy nuclear particles in cosmic rays can cause changes in the state of the circuit, such as transients in combinational logic and bit flips in storage-type units. This effect is the effect of a single particle The result is often called single event effect. [0003] With the further shrinking of the feature size of the integrated circuit manufacturing process, the reduction of the device size is accompanied by the reduction of the node capacitance, and the critical charge required for the circuit to undergo a single event flip (that is, from 0 to 1 or 1 to 0) becomes extremely high. Low. For...
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IPC IPC(8): G06F17/50
CPCG06F30/392
Inventor 王丹李东强赵元富岳素格王亮孙永姝
Owner BEIJING MXTRONICS CORP