Programmable time sequence generator

Abstract

The present invention provides a programmable time sequence generator. The programmable time sequence generator comprises a counter unit, an FIFO unit, a comparator unit and a latch unit. The counter unit and the FIFO unit are both connected to the comparator unit, and the FIFO unit and the comparator unit are both connected to the latch unit; The FIFO unit stores three sets of values, i.e. A, B and C, and the values of the sets A, B and C are read out from the FIFO unit firstly; The comparator unit compares an A value output by the FIFO unit with a counting value of the counter unit, and after the counter unit is cleared when the A value is equal to the counting value, currently output data is latched into the latch unit, and a calculation formula of the output data is that the current output data equals to (last output data and (not C)) or (B and C), wherein, when the currently output data is output data in an initial state, the last output data equals to 0; and then a next set of values of the sets A, B and C are read out from the FIFO unit. The programmable time sequence generator provided by the present invention is capable of preventing an output time sequence from being solidified and thus outputting any time sequence, and occupies very few CPU resources.

Description

technical field [0001] The invention relates to a programmable timing generator. Background technique [0002] IC and IC connection communication need to abide by the agreed timing to send and receive data to each other. So there will be many controllers inside the IC, such as IIC controller, SPI controller, LCD controller and so on. There will be a timing generator at the output of each controller, but the existing products are designed to fix it, and there will be ICs that cannot support non-standard or upgraded versions. In this case, someone will choose to use GPIO to simulate the corresponding timing, but it will take up a lot of CPU resources, and the frequency is not high. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a programmable timing generator, which can output arbitrary timing through software configuration, and occupies less CPU resources. [0004] The present invention is achieved as follows:...

AI Technical Summary

Problems solved by technology

There will be a timing generator at the output of each controller, but the existing products are designed to fix it, and there will be ICs that cannot support non-standard or upgraded versions

In this case, someone will choose to use GPIO to simulate the corresponding timing, but it will take up a lot of CPU resources and the frequency is not high.

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