A parallel instruction set pre-decoding method and system running on cuda platform
An instruction set and pre-decoding technology, applied in the field of instruction pre-decoding, can solve problems such as unfavorable discovery and positioning, affecting the execution results of the tested software, and limited storage space, so as to improve the efficiency of simulation operation and shorten the debugging operation process , The effect of shortening the time of pre-decoding
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[0042] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.
[0043] Such as figure 1 Shown, the present invention runs on the parallel instruction set pre-decoding method of CUDA platform and comprises the following steps:
[0044] S1: Analyze the executable file to obtain binary instructions;
[0045] S2: transfer the obtained binary instruction data and output array into the memory;
[0046] S3: register the binary instruction and the analysis function corresponding to the binary instruction;
[0047] S4: Read binary instructions, and decode all binary instructions in parallel;
[0048] S5: Save the intermediate data after decoding each binary instruction to the corresponding position of the output array;
[0049] S6: Determine whether all the data in the output array have been saved, if yes, send the output array back to the host, if not, continue to step S4;
[0050] S7: After processing by the...
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