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Anchor point based wiring method

A wiring method and anchor point technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as unbalanced signal and data delay time, and achieve the effect of delay balance

Active Publication Date: 2016-08-17
CAPITAL MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the existing routing method based on the PathFinder routing algorithm cannot balance the delay time of signals and data well

Method used

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Embodiment Construction

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0025] figure 1 It is a schematic flowchart of an anchor point-based routing method 100 according to an embodiment of the present invention. Such as figure 1 The method 100 includes:

[0026] 110. Determine N-level anchor points in the line network, each level of anchor points in the N-level anchor points includes at least one anchor point, and the delay between each anchor point in each level of anchor points and the connected destination point is the s...

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Abstract

An embodiment of the present invention discloses an anchor point based wiring method. The method comprises: determining N levels of anchor points in a net, wherein each level of anchor points among the N levels of anchor points comprise at least one anchor point, a delay from each anchor point in each level of anchor points to a connected target point is the same or similar, a delay from a source point to each anchor point among each level of anchor points is the same or similar, and the delay comprises a data delay and / or a signal delay; and dividing the net into N+1 levels of nets by the N levels of anchor points, and performing wire-winding on the N+1 levels of nets separately, wherein N takes a positive integer that is greater than or equal to 1. According to the anchor point based wiring method disclosed by the embodiment of the present invention, by determining the anchor points that meet a condition in the net, it is ensured that delays from the source point to all the target points via the anchor points can be balanced while wire winding.

Description

technical field [0001] The invention relates to the technical field of integrated circuit design in the field of microelectronics, in particular to an anchor point-based wiring method. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, "FPGA" for short), is a logic device with abundant hardware resources, powerful parallel processing capability and flexible reconfigurable capability. Therefore, FPGA is more and more widely used in data processing, communication, network and other fields. [0003] The FPGA design process includes: design entry, debugging, functional simulation, synthesis, layout and routing, timing simulation, configuration download and other steps. Among them, the layout refers to the reasonable adaptation of the hardware primitives or underlying units in the logic netlist to the inherent hardware structure inside the FPGA. The quality of the layout has a great impact on the final result of the design (in terms of sp...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 徐静孙铁力
Owner CAPITAL MICROELECTRONICS