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Support of non-hevc base layer in HEVC multi-layer extensions

A base layer and reference layer technology, applied in image communication, digital video signal modification, electrical components, etc.

Active Publication Date: 2016-08-24
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Spatial or temporal prediction leads to a predictive block of the block to be decoded

Method used

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  • Support of non-hevc base layer in HEVC multi-layer extensions
  • Support of non-hevc base layer in HEVC multi-layer extensions
  • Support of non-hevc base layer in HEVC multi-layer extensions

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Experimental program
Comparison scheme
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Embodiment Construction

[0025] Certain embodiments described herein relate to inter-layer prediction for scalable video coding, such as HEVC (High Efficiency Video Coding), in the context of advanced video codecs. More specifically, the present invention relates to systems and methods for improved performance of inter-layer prediction in multi-layer video coding.

[0026] In the following description, H.264 / AVC techniques are described in relation to certain embodiments; the HEVC standard and related techniques are also discussed. Although certain embodiments are described herein in the context of HEVC and / or H.264 standards and contexts, those skilled in the art will appreciate that the systems and methods disclosed herein may be applicable to any suitable video coding standard. For example, embodiments disclosed herein may be applicable to one or more of the following standards: ITU-T H.261, ISO / IEC MPEG-1 Visual, ITU-T H.262 or ISO / IEC MPEG-2 Visual, ITU -T H.263, ISO / IEC MPEG-4Visual and ITU-T H...

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Abstract

An apparatus configured to decode video information includes a memory and a processor in communication with the memory. The memory is configured to a memory configured to store video information associated with bitstream. The apparatus further includes a processor in communication with the memory, the processor configured to determine that a reference layer is not included in the bitstream and to receive, from an external source, a decoded base layer picture. The processor is further configured to receive, from the external source, a first indication that the picture is an intra random access point (IRAP) picture. The processor is also configured to receive a second indication whether the picture is one of an instantaneous decoder refresh (IDR) picture, a clean random access (CRA) picture, or a broken link access (BLA) picture; and to decode the video information based at least in part on the first and second indications.

Description

technical field [0001] The present invention relates to the field of video coding and compression, in particular to scalable video coding (SVC), multi-view video coding (MVC) or three-dimensional (3D) video coding. Background technique [0002] Digital video capabilities can be incorporated into a wide variety of devices, including digital television, digital broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, digital cameras, digital recording devices, digital Media players, video game devices, video game consoles, cellular or satellite radio phones, video teleconferencing devices and the like. Digital video devices implement video compression techniques such as those defined in MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 Part 10 Advanced Video Coding (AVC) , the video compression techniques described in the High Efficiency Video Coding (HEVC) standard currently under development, and extensions to such standa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/70H04N19/30
CPCH04N19/30H04N19/33H04N19/59H04N19/70H04N19/105H04N19/136H04N19/187H04N19/29H04N19/39H04N19/44H04N19/172H04N19/42H04N19/597
Inventor 王益魁
Owner QUALCOMM INC