Differential sar ADC and its switched capacitor structure, A/D conversion method, layout implementation method

Abstract

The present invention provides an SAR ADC, a switched capacitor structure thereof, an A / D conversion method and a layout realization method, wherein the SAR ADC comprises an SAR logic circuit, a voltage comparator, a capacitor array and a switch array; the capacitor array comprises the sampling capacitors and the operation capacitors, and the switch array comprises the sampling switches used for controlling the sampling capacitors to sample at a sampling phase, the pre-charging switches used for controlling the operation capacitors to be pre-charged, the heterodromous connection switches used for controlling the heterodromous connection of the operation capacitors and the sampling capacitors and the homodromous connection switches used for controlling the homodromous connection of the operation capacitors and the sampling capacitors. The output end of the voltage comparator is connected with the SAR logic circuit, and the SAR logic circuit generates the switch control signals according to the output of the voltage comparator to control the states of the switches in the switch array.

Description

technical field [0001] The present invention relates to the field of analog-to-digital converters, in particular to a differential progressive-approximation-register (SAR) analog-to-digital converter (analog-to-digital converter, ADC) and its switched capacitor structure, A / D conversion method, layout implementation method. Background technique [0002] There are various architectures of analog-to-digital converters (ADCs), such as flash ADCs, pipelined ADCs, and gradual approximation (SAR) ADCs. Each of these architectures has its own advantages and is usually selected based on different application requirements. Among them, SAR ADC consumes lower power, smaller area and lower cost than other architectures. [0003] An N-bit SAR ADC generally includes a sample-and-hold (S / H) circuit, an N-bit digital-to-analog converter (DAC), a voltage comparator, and a SAR logic circuit. A conversion cycle of SARADC begins with the sampling phase (sampling phase). In the sampling stag...

AI Technical Summary

Problems solved by technology

like figure 1 Shown is an ordinary differential SAR ADC, the differential SAR ADC has many capacitors, resulting in a larger circuit scale and higher complexity, resulting in a larger chip area and higher power consumption of the SAR ADC

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